Lines Matching defs:flags

117        * abs/neg flags are split out into float and int variants.  In
133 /* meta-flags, for intermediate stages of IR, ie.
161 } flags;
316 /* meta-flags, for intermediate stages of IR, ie.
321 } flags;
721 int flags);
723 int flags);
745 if (instr->flags & IR3_INSTR_MARK)
747 instr->flags |= IR3_INSTR_MARK;
797 bool ir3_valid_flags(struct ir3_instruction *instr, unsigned n, unsigned flags);
841 unsigned dst_type = (dst->flags & IR3_REG_HALF);
842 unsigned src_type = (src->flags & IR3_REG_HALF);
848 ((dst->flags & IR3_REG_SHARED) && !(src->flags & IR3_REG_SHARED)))
875 if (instr->flags & IR3_INSTR_SAT)
897 if (dst->flags & (IR3_REG_RELATIV | IR3_REG_ARRAY))
912 if (!(instr->srcs[0]->flags & IR3_REG_CONST))
980 return !!(instr->dsts[0]->flags & IR3_REG_HALF);
986 return !!(instr->dsts[0]->flags & IR3_REG_SHARED);
1139 if (reg->flags & IR3_REG_ARRAY)
1148 return (reg->flags & IR3_REG_HALF) ? 1 : 2;
1227 return (reg->flags & IR3_REG_SHARED) || (reg_num(reg) == REG_A0) ||
1245 if ((reg->flags & (IR3_REG_SSA | IR3_REG_ARRAY)) && reg->def)
1259 if (r->flags & (IR3_REG_CONST | IR3_REG_IMMED))
1356 /* map cat2 instruction to valid abs/neg flags: */
1417 /* map cat3 instructions to valid abs/neg flags: */
1541 return (instr->dsts[0]->flags & IR3_REG_HALF) ? half_type(base_type)
1559 return (instr->srcs[0]->flags & IR3_REG_HALF) ? half_type(base_type)
1567 return (instr->dsts[0]->flags & IR3_REG_HALF) ? half_type(base_type)
1744 if (dst->flags & IR3_REG_SHARED)
1909 unsigned flags)
1912 if (src->dsts[0]->flags & IR3_REG_HALF)
1913 flags |= IR3_REG_HALF;
1914 reg = ir3_src_create(instr, INVALID_REG, IR3_REG_SSA | flags);
1932 unsigned flags = (type_size(type) < 32) ? IR3_REG_HALF : 0;
1937 __ssa_dst(mov)->flags |= flags;
1938 ir3_src_create(mov, 0, IR3_REG_IMMED | flags)->uim_val = val;
1953 unsigned flags = (type_size(type) < 32) ? IR3_REG_HALF : 0;
1958 __ssa_dst(mov)->flags |= flags;
1959 ir3_src_create(mov, n, IR3_REG_CONST | flags);
1991 unsigned flags = (type_size(type) < 32) ? IR3_REG_HALF : 0;
1993 __ssa_dst(instr)->flags |= flags;
1994 if (src->dsts[0]->flags & IR3_REG_ARRAY) {
1998 __ssa_src(instr, src, src->dsts[0]->flags & IR3_REG_SHARED);
2000 assert(!(src->dsts[0]->flags & IR3_REG_RELATIV));
2014 assert((src->dsts[0]->flags & IR3_REG_HALF) == src_flags);
2016 __ssa_dst(instr)->flags |= dst_flags;
2020 assert(!(src->dsts[0]->flags & IR3_REG_ARRAY));
2030 dst->flags |= IR3_REG_SHARED;
2044 dst->flags |= IR3_REG_SHARED;
2063 instr->flags |= flag; \
2080 instr->flags |= flag; \
2099 instr->flags |= flag; \
2121 instr->flags |= flag; \
2144 instr->flags |= flag; \
2167 instr->flags |= flag; \
2192 instr->flags |= flag; \
2332 unsigned flags, struct ir3_instruction *samp_tex,
2338 if (flags & IR3_INSTR_S2EN) {
2349 sam->flags |= flags;
2351 if (flags & IR3_INSTR_S2EN) {
2352 __ssa_src(sam, samp_tex, (flags & IR3_INSTR_B) ? 0 : IR3_REG_HALF);
2573 bool half = reg->flags & IR3_REG_HALF;
2574 if (reg->flags & IR3_REG_RELATIV) {
2587 bool half = reg->flags & IR3_REG_HALF;
2588 if (reg->flags & IR3_REG_RELATIV) {
2601 bool half = reg->flags & IR3_REG_HALF;
2602 if (reg->flags & IR3_REG_RELATIV) {