Lines Matching refs:instr
38 #include "instr-a3xx.h"
87 collect_reg_info(struct ir3_instruction *instr, struct ir3_register *reg,
91 unsigned repeat = instr->repeat;
281 foreach_instr (instr, &block->instr_list) {
300 foreach_instr (instr, &block->instr_list) {
302 foreach_src (reg, instr) {
303 collect_reg_info(instr, reg, info);
306 foreach_dst (reg, instr) {
308 collect_reg_info(instr, reg, info);
312 if ((instr->opc == OPC_STP || instr->opc == OPC_LDP)) {
313 unsigned components = instr->srcs[2]->uim_val;
314 if (components * type_size(instr->cat6.type) > 32) {
318 if (instr->opc == OPC_STP)
324 if ((instr->opc == OPC_BARY_F || instr->opc == OPC_FLAT_B) &&
325 (instr->dsts[0]->flags & IR3_REG_EI))
328 if (instr->opc == OPC_SHPS)
337 unsigned instrs_count = 1 + instr->repeat + instr->nop;
338 unsigned nops_count = instr->nop;
340 if (instr->opc == OPC_NOP) {
341 nops_count = 1 + instr->repeat;
344 info->instrs_per_cat[opc_cat(instr->opc)] += 1 + instr->repeat;
348 if (instr->opc == OPC_MOV) {
349 if (instr->cat1.src_type == instr->cat1.dst_type) {
350 info->mov_count += 1 + instr->repeat;
352 info->cov_count += 1 + instr->repeat;
359 if (instr->flags & IR3_INSTR_SS) {
365 if (instr->flags & IR3_INSTR_SY) {
371 if (is_ss_producer(instr)) {
372 sfu_delay = soft_ss_delay(instr);
374 int n = MIN2(sfu_delay, 1 + instr->repeat + instr->nop);
378 if (is_sy_producer(instr)) {
379 mem_delay = soft_sy_delay(instr, shader);
381 int n = MIN2(mem_delay, 1 + instr->repeat + instr->nop);
386 if (instr->opc == OPC_SHPE)
418 insert_instr(struct ir3_block *block, struct ir3_instruction *instr)
422 instr->serialno = ++shader->instr_count;
424 list_addtail(&instr->node, &block->instr_list);
426 if (is_input(instr))
427 array_insert(shader, shader->baryfs, instr);
506 struct ir3_instruction *instr;
507 unsigned sz = sizeof(*instr) + (ndst * sizeof(instr->dsts[0])) +
508 (nsrc * sizeof(instr->srcs[0]));
511 instr = (struct ir3_instruction *)ptr;
512 ptr += sizeof(*instr);
513 instr->dsts = (struct ir3_register **)ptr;
514 instr->srcs = instr->dsts + ndst;
517 instr->dsts_max = ndst;
518 instr->srcs_max = nsrc;
521 return instr;
527 struct ir3_instruction *instr = instr_create(block, opc, ndst, nsrc);
528 instr->block = block;
529 instr->opc = opc;
530 insert_instr(block, instr);
531 return instr;
535 ir3_instr_clone(struct ir3_instruction *instr)
538 instr->block, instr->opc, instr->dsts_count, instr->srcs_count);
543 *new_instr = *instr;
547 insert_instr(instr->block, new_instr);
552 foreach_dst (reg, instr) {
556 if (new_reg->instr)
557 new_reg->instr = new_instr;
559 foreach_src (reg, instr) {
565 if (instr->address) {
566 assert(instr->srcs_count > 0);
567 new_instr->address = new_instr->srcs[instr->srcs_count - 1];
575 ir3_instr_add_dep(struct ir3_instruction *instr, struct ir3_instruction *dep)
577 for (unsigned i = 0; i < instr->deps_count; i++) {
578 if (instr->deps[i] == dep)
582 array_insert(instr, instr->deps, dep);
586 ir3_src_create(struct ir3_instruction *instr, int num, int flags)
588 struct ir3 *shader = instr->block->shader;
590 assert(instr->srcs_count < instr->srcs_max);
593 instr->srcs[instr->srcs_count++] = reg;
598 ir3_dst_create(struct ir3_instruction *instr, int num, int flags)
600 struct ir3 *shader = instr->block->shader;
602 assert(instr->dsts_count < instr->dsts_max);
605 instr->dsts[instr->dsts_count++] = reg;
618 ir3_reg_set_last_array(struct ir3_instruction *instr, struct ir3_register *reg,
622 struct ir3_register *new_reg = ir3_src_create(instr, 0, 0);
629 ir3_instr_set_address(struct ir3_instruction *instr,
632 if (!instr->address) {
633 struct ir3 *ir = instr->block->shader;
635 assert(instr->block == addr->block);
637 instr->address =
638 ir3_src_create(instr, addr->dsts[0]->num, addr->dsts[0]->flags);
639 instr->address->def = addr->dsts[0];
643 array_insert(ir, ir->a0_users, instr);
646 array_insert(ir, ir->a1_users, instr);
649 assert(instr->address->def->instr == addr);
656 foreach_instr (instr, &block->instr_list)
657 instr->flags &= ~IR3_INSTR_MARK;
674 foreach_instr (instr, &block->instr_list) {
675 instr->ip = cnt++;
697 foreach_instr (instr, &block->instr_list) {
698 instr->ip = cnt++;
722 foreach_instr (instr, &block->instr_list)
723 instr->uses = NULL;
726 foreach_instr (instr, &block->instr_list) {
727 foreach_ssa_src_n (src, n, instr) {
728 if (__is_false_dep(instr, n) && !falsedeps)
732 _mesa_set_add(src->uses, instr);
744 ir3_set_dst_type(struct ir3_instruction *instr, bool half)
747 instr->dsts[0]->flags |= IR3_REG_HALF;
749 instr->dsts[0]->flags &= ~IR3_REG_HALF;
752 switch (opc_cat(instr->opc)) {
755 instr->cat1.dst_type = half_type(instr->cat1.dst_type);
757 instr->cat1.dst_type = full_type(instr->cat1.dst_type);
762 instr->opc = cat4_half_opc(instr->opc);
764 instr->opc = cat4_full_opc(instr->opc);
769 instr->cat5.type = half_type(instr->cat5.type);
771 instr->cat5.type = full_type(instr->cat5.type);
782 ir3_fixup_src_type(struct ir3_instruction *instr)
784 if (instr->srcs_count == 0)
787 switch (opc_cat(instr->opc)) {
789 if (instr->srcs[0]->flags & IR3_REG_HALF) {
790 instr->cat1.src_type = half_type(instr->cat1.src_type);
792 instr->cat1.src_type = full_type(instr->cat1.src_type);
796 if (instr->srcs[0]->flags & IR3_REG_HALF) {
797 instr->opc = cat3_half_opc(instr->opc);
799 instr->opc = cat3_full_opc(instr->opc);
861 ir3_valid_flags(struct ir3_instruction *instr, unsigned n, unsigned flags)
863 struct ir3_compiler *compiler = instr->block->shader->compiler;
866 if ((flags & IR3_REG_SHARED) && opc_cat(instr->opc) > 3)
874 if (instr->dsts_count > 0 && (instr->dsts[0]->flags & IR3_REG_RELATIV) &&
891 if (instr->srcs[n]->flags & IR3_REG_SSA) {
892 struct ir3_instruction *src = ssa(instr->srcs[n]);
893 if (src->address->def->instr->block != instr->block)
898 if (is_meta(instr)) {
905 if ((flags & IR3_REG_SHARED) && !(instr->dsts[0]->flags & IR3_REG_SHARED))
911 switch (opc_cat(instr->opc)) {
915 switch (instr->opc) {
933 valid_flags = ir3_cat2_absneg(instr->opc) | IR3_REG_CONST |
940 if (instr->opc == OPC_FLAT_B &&
949 if (m < instr->srcs_count) {
950 struct ir3_register *reg = instr->srcs[m];
961 ir3_cat3_absneg(instr->opc) | IR3_REG_RELATIV | IR3_REG_SHARED;
963 switch (instr->opc) {
1025 if (is_store(instr) && (instr->opc != OPC_STG) && (n == 1))
1028 if ((instr->opc == OPC_LDL) && (n == 0))
1031 if ((instr->opc == OPC_STL) && (n != 2))
1034 if ((instr->opc == OPC_LDP) && (n == 0))
1037 if ((instr->opc == OPC_STP) && (n != 2))
1040 if (instr->opc == OPC_STLW && n == 0)
1043 if (instr->opc == OPC_LDLW && n == 0)
1049 if (is_global_a3xx_atomic(instr->opc) && (n != 0))
1052 if (is_local_atomic(instr->opc) || is_global_a6xx_atomic(instr->opc) ||
1053 is_bindless_atomic(instr->opc))
1056 if (instr->opc == OPC_STG && (n == 2))
1059 if (instr->opc == OPC_STG_A && (n == 4))
1062 if (instr->opc == OPC_LDG && (n == 0))
1065 if (instr->opc == OPC_LDG_A && (n < 2))
1071 switch (instr->opc) {
1090 ir3_valid_immediate(struct ir3_instruction *instr, int32_t immed)
1092 if (instr->opc == OPC_MOV || is_meta(instr))
1095 if (is_mem(instr)) {
1096 switch (instr->opc) {