Lines Matching defs:reg
73 struct ir3_register *reg)
75 if (const_state->shared_consts_enable && reg->flags & IR3_REG_CONST) {
80 return reg->num >= min_const_reg && min_const_reg < max_const_reg;
87 collect_reg_info(struct ir3_instruction *instr, struct ir3_register *reg,
93 if (reg->flags & IR3_REG_IMMED) {
99 if (is_shared_consts(v->compiler, ir3_const_state(v), reg))
102 if (!(reg->flags & IR3_REG_R)) {
109 if (reg->flags & IR3_REG_RELATIV) {
110 components = reg->size;
111 max = (reg->array.base + components - 1);
113 components = util_last_bit(reg->wrmask);
114 max = (reg->num + repeat + components - 1);
117 if (reg->flags & IR3_REG_CONST) {
120 if (reg->flags & IR3_REG_HALF) {
253 /* Get the maximum number of waves that could be launched limited by reg size.
302 foreach_src (reg, instr) {
303 collect_reg_info(instr, reg, info);
306 foreach_dst (reg, instr) {
307 if (is_dest_gpr(reg)) {
308 collect_reg_info(instr, reg, info);
410 struct ir3_register *reg = ir3_alloc(shader, sizeof(struct ir3_register));
411 reg->wrmask = 1;
412 reg->flags = flags;
413 reg->num = num;
414 return reg;
503 /* Add extra sources for array destinations and the address reg */
552 foreach_dst (reg, instr) {
554 ir3_dst_create(new_instr, reg->num, reg->flags);
555 *new_reg = *reg;
559 foreach_src (reg, instr) {
561 ir3_src_create(new_instr, reg->num, reg->flags);
562 *new_reg = *reg;
592 struct ir3_register *reg = reg_create(shader, num, flags);
593 instr->srcs[instr->srcs_count++] = reg;
594 return reg;
604 struct ir3_register *reg = reg_create(shader, num, flags);
605 instr->dsts[instr->dsts_count++] = reg;
606 return reg;
610 ir3_reg_clone(struct ir3 *shader, struct ir3_register *reg)
613 *new_reg = *reg;
618 ir3_reg_set_last_array(struct ir3_instruction *instr, struct ir3_register *reg,
621 assert(reg->flags & IR3_REG_ARRAY);
623 *new_reg = *reg;
625 ir3_reg_tie(reg, new_reg);
950 struct ir3_register *reg = instr->srcs[m];
952 (reg->flags & (IR3_REG_CONST | IR3_REG_SHARED)))
954 if ((flags & IR3_REG_IMMED) && reg->flags & (IR3_REG_IMMED))