Lines Matching defs:pipe
33 query_param(struct fd_pipe *pipe, uint32_t param, uint64_t *value)
35 struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
37 .pipe = msm_pipe->pipe,
43 drmCommandWriteRead(pipe->dev->fd, DRM_MSM_GET_PARAM, &req, sizeof(req));
53 query_queue_param(struct fd_pipe *pipe, uint32_t param, uint64_t *value)
55 struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
64 ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_QUERY, &req,
73 msm_pipe_get_param(struct fd_pipe *pipe, enum fd_param_id param,
76 struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
92 return query_param(pipe, MSM_PARAM_MAX_FREQ, value);
94 return query_param(pipe, MSM_PARAM_TIMESTAMP, value);
96 return query_param(pipe, MSM_PARAM_NR_RINGS, value);
98 return query_queue_param(pipe, MSM_SUBMITQUEUE_PARAM_FAULTS, value);
100 return query_param(pipe, MSM_PARAM_FAULTS, value);
102 return query_param(pipe, MSM_PARAM_SUSPENDS, value);
110 set_param(struct fd_pipe *pipe, uint32_t param, uint64_t value)
112 struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
114 .pipe = msm_pipe->pipe,
119 return drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SET_PARAM,
124 msm_pipe_set_param(struct fd_pipe *pipe, enum fd_param_id param, uint64_t value)
128 return set_param(pipe, MSM_PARAM_SYSPROF, value);
136 msm_pipe_wait(struct fd_pipe *pipe, const struct fd_fence *fence, uint64_t timeout)
138 struct fd_device *dev = pipe->dev;
141 .queueid = to_msm_pipe(pipe)->queue_id,
156 open_submitqueue(struct fd_pipe *pipe, uint32_t prio)
165 if (fd_device_version(pipe->dev) < FD_VERSION_SUBMIT_QUEUES) {
166 to_msm_pipe(pipe)->queue_id = 0;
170 msm_pipe_get_param(pipe, FD_NR_RINGS, &nr_rings);
174 ret = drmCommandWriteRead(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_NEW, &req,
181 to_msm_pipe(pipe)->queue_id = req.id;
186 close_submitqueue(struct fd_pipe *pipe, uint32_t queue_id)
188 if (fd_device_version(pipe->dev) < FD_VERSION_SUBMIT_QUEUES)
191 drmCommandWrite(pipe->dev->fd, DRM_MSM_SUBMITQUEUE_CLOSE, &queue_id,
196 msm_pipe_destroy(struct fd_pipe *pipe)
198 struct msm_pipe *msm_pipe = to_msm_pipe(pipe);
200 close_submitqueue(pipe, msm_pipe->queue_id);
201 fd_pipe_sp_ringpool_fini(pipe);
225 get_param(struct fd_pipe *pipe, uint32_t param)
228 int ret = query_param(pipe, param, &value);
244 struct fd_pipe *pipe = NULL;
252 pipe = &msm_pipe->base;
255 pipe->funcs = &sp_funcs;
257 pipe->funcs = &legacy_funcs;
261 pipe->dev = dev;
262 msm_pipe->pipe = pipe_id[id];
265 msm_pipe->gpu_id = get_param(pipe, MSM_PARAM_GPU_ID);
266 msm_pipe->gmem = get_param(pipe, MSM_PARAM_GMEM_SIZE);
267 msm_pipe->chip_id = get_param(pipe, MSM_PARAM_CHIP_ID);
269 if (fd_device_version(pipe->dev) >= FD_VERSION_GMEM_BASE)
270 msm_pipe->gmem_base = get_param(pipe, MSM_PARAM_GMEM_BASE);
280 if (open_submitqueue(pipe, prio))
283 fd_pipe_sp_ringpool_init(pipe);
285 return pipe;
287 if (pipe)
288 fd_pipe_del(pipe);