Lines Matching defs:emu
29 #include "emu.h"
50 emu_get_control_reg(struct emu *emu, unsigned n)
52 assert(n < ARRAY_SIZE(emu->control_regs.val));
54 return emu_get_draw_state_reg(emu, n);
55 return emu->control_regs.val[n];
59 emu_set_control_reg(struct emu *emu, unsigned n, uint32_t val)
66 assert(n < ARRAY_SIZE(emu->control_regs.val));
67 BITSET_SET(emu->control_regs.written, n);
68 emu->control_regs.val[n] = val;
72 unsigned write_addr = emu_get_reg32(emu, &PACKET_TABLE_WRITE_ADDR);
74 assert(write_addr < ARRAY_SIZE(emu->jmptbl));
75 emu->jmptbl[write_addr] = val;
77 emu_set_reg32(emu, &PACKET_TABLE_WRITE_ADDR, write_addr + 1);
79 uint32_t write_addr = emu_get_reg32(emu, ®_WRITE_ADDR);
87 emu_set_gpu_reg(emu, write_addr++, val);
88 emu_set_reg32(emu, ®_WRITE_ADDR, write_addr | (flags << 16));
90 emu_set_draw_state_reg(emu, n, val);
95 emu_get_pipe_reg(struct emu *emu, unsigned n)
97 assert(n < ARRAY_SIZE(emu->pipe_regs.val));
98 return emu->pipe_regs.val[n];
102 emu_set_pipe_reg(struct emu *emu, unsigned n, uint32_t val)
107 assert(n < ARRAY_SIZE(emu->pipe_regs.val));
108 BITSET_SET(emu->pipe_regs.written, n);
109 emu->pipe_regs.val[n] = val;
113 uintptr_t addr = emu_get_reg64(emu, &NRT_ADDR);
115 emu_mem_write_dword(emu, addr, val);
117 emu_set_reg64(emu, &NRT_ADDR, addr + 4);
122 emu_get_gpu_reg(struct emu *emu, unsigned n)
124 if (n >= ARRAY_SIZE(emu->gpu_regs.val))
126 assert(n < ARRAY_SIZE(emu->gpu_regs.val));
127 return emu->gpu_regs.val[n];
131 emu_set_gpu_reg(struct emu *emu, unsigned n, uint32_t val)
133 if (n >= ARRAY_SIZE(emu->gpu_regs.val))
135 assert(n < ARRAY_SIZE(emu->gpu_regs.val));
136 BITSET_SET(emu->gpu_regs.written, n);
137 emu->gpu_regs.val[n] = val;
147 get_reg_addr(struct emu *emu)
149 switch (emu->data_mode) {
161 emu_get_fifo_reg(struct emu *emu, unsigned n)
173 unsigned read_dwords = emu_get_reg32(emu, &MEM_READ_DWORDS);
174 uintptr_t read_addr = emu_get_reg64(emu, &MEM_READ_ADDR);
177 emu_set_reg32(emu, &MEM_READ_DWORDS, read_dwords - 1);
178 emu_set_reg64(emu, &MEM_READ_ADDR, read_addr + 4);
181 return emu_mem_read_dword(emu, read_addr);
187 unsigned read_dwords = emu_get_reg32(emu, ®_READ_DWORDS);
188 unsigned read_addr = emu_get_reg32(emu, ®_READ_ADDR);
195 emu_set_reg32(emu, ®_READ_DWORDS, read_dwords - 1);
196 emu_set_reg32(emu, ®_READ_ADDR, read_addr + 1);
199 return emu_get_gpu_reg(emu, read_addr);
203 uint32_t rem = emu->gpr_regs.val[REG_REM];
207 if (emu_queue_pop(&emu->roq, &val)) {
208 emu_set_gpr_reg(emu, REG_REM, --rem);
214 emu->run_mode = false;
215 emu_main_prompt(emu);
224 emu_set_fifo_reg(struct emu *emu, unsigned n, uint32_t val)
227 emu->data_mode = (n == REG_ADDR) ? DATA_ADDR : DATA_USRADDR;
233 emu->gpr_regs.val[n] = val;
234 BITSET_SET(emu->gpr_regs.written, n);
241 emu_set_pipe_reg(emu, val >> 24, 0);
242 emu->data_mode = DATA_PIPE;
245 unsigned reg = get_reg_addr(emu);
246 unsigned regoff = emu->gpr_regs.val[reg];
260 emu->gpr_regs.val[reg] = regoff + 0x01000000;
261 BITSET_SET(emu->gpr_regs.written, reg);
264 emu_set_pipe_reg(emu, regoff >> 24, val);
267 emu_set_gpr_reg(emu, reg, regoff+1);
268 emu_set_gpu_reg(emu, regoff, val);
274 emu_get_gpr_reg(struct emu *emu, unsigned n)
276 assert(n < ARRAY_SIZE(emu->gpr_regs.val));
285 return emu_get_fifo_reg(emu, n);
287 return emu->gpr_regs.val[n];
292 emu_set_gpr_reg(struct emu *emu, unsigned n, uint32_t val)
294 assert(n < ARRAY_SIZE(emu->gpr_regs.val));
300 emu_set_fifo_reg(emu, n, val);
303 emu->gpr_regs.val[n] = val;
304 BITSET_SET(emu->gpr_regs.written, n);
315 uint32_t (*get)(struct emu *emu, unsigned n);
316 void (*set)(struct emu *emu, unsigned n, uint32_t val);
346 emu_get_reg32(struct emu *emu, struct emu_reg *reg)
348 return reg->accessor->get(emu, emu_reg_offset(reg));
352 emu_get_reg64(struct emu *emu, struct emu_reg *reg)
354 uint64_t val = reg->accessor->get(emu, emu_reg_offset(reg) + 1);
356 val |= reg->accessor->get(emu, emu_reg_offset(reg));
361 emu_set_reg32(struct emu *emu, struct emu_reg *reg, uint32_t val)
363 reg->accessor->set(emu, emu_reg_offset(reg), val);
367 emu_set_reg64(struct emu *emu, struct emu_reg *reg, uint64_t val)
369 reg->accessor->set(emu, emu_reg_offset(reg), val);
370 reg->accessor->set(emu, emu_reg_offset(reg) + 1, val >> 32);