Lines Matching defs:first
606 nir_intrinsic_instr *first = get_intrinsic(nir_intrinsic_copy_deref, 0);
608 ASSERT_EQ(nir_intrinsic_src_access(first), ACCESS_VOLATILE);
609 ASSERT_EQ(nir_intrinsic_dst_access(first), (gl_access_qualifier)0);
1204 /* Third store will just use the value from first store. */
1210 /* Fourth store will compose first and second store values. */
1246 nir_intrinsic_instr *first = get_intrinsic(nir_intrinsic_store_deref, 0);
1248 ASSERT_TRUE(first->src[1].is_ssa);
1250 EXPECT_EQ(first->src[1].ssa, second->src[1].ssa);
1323 nir_intrinsic_instr *first = get_intrinsic(nir_intrinsic_store_deref, 0);
1325 ASSERT_TRUE(first->src[1].is_ssa);
1327 EXPECT_EQ(first->src[1].ssa, second->src[1].ssa);
1370 nir_intrinsic_instr *first = get_intrinsic(nir_intrinsic_store_deref, 0);
1372 ASSERT_TRUE(first->src[1].is_ssa);
1374 EXPECT_EQ(first->src[1].ssa, third->src[1].ssa);
1503 nir_intrinsic_instr *first = get_intrinsic(nir_intrinsic_store_deref, 0);
1505 ASSERT_TRUE(first->src[1].is_ssa);
1507 EXPECT_EQ(first->src[1].ssa, third->src[1].ssa);
1642 * kill the first write.
1819 /* Verify the first write to v[0] was removed. */
2020 nir_intrinsic_instr *first = get_intrinsic(nir_intrinsic_store_deref, 0);
2021 ASSERT_EQ(nir_intrinsic_write_mask(first), 0x3);
2022 ASSERT_EQ(vec_src_comp_as_int(first->src[1], 0), 0);
2023 ASSERT_EQ(vec_src_comp_as_int(first->src[1], 1), 1);