Lines Matching defs:shader
1286 lookup_input(nir_shader *shader, unsigned driver_location)
1288 return nir_find_variable_with_driver_location(shader, nir_var_shader_in,
1308 nir_unsigned_upper_bound(nir_shader *shader, struct hash_table *range_ht,
1337 * compute-like shader stages.
1339 if (!gl_shader_stage_uses_workgroup(shader->info.stage) ||
1340 shader->info.workgroup_size_variable) {
1343 res = (shader->info.workgroup_size[0] *
1344 shader->info.workgroup_size[1] *
1345 shader->info.workgroup_size[2]) - 1u;
1349 if (shader->info.workgroup_size_variable)
1352 res = shader->info.workgroup_size[scalar.comp] - 1u;
1361 if (shader->info.workgroup_size_variable) {
1365 res = (shader->info.workgroup_size[scalar.comp] *
1370 if (shader->info.stage == MESA_SHADER_TESS_CTRL)
1371 res = shader->info.tess.tcs_vertices_out
1372 ? (shader->info.tess.tcs_vertices_out - 1)
1381 uint32_t src1 = nir_unsigned_upper_bound(shader, range_ht, nir_get_ssa_scalar(intrin->src[1].ssa, 0), config);
1395 if (gl_shader_stage_uses_workgroup(shader->info.stage) &&
1396 !shader->info.workgroup_size_variable) {
1397 workgroup_size = shader->info.workgroup_size[0] *
1398 shader->info.workgroup_size[1] *
1399 shader->info.workgroup_size[2];
1407 if (shader->info.stage == MESA_SHADER_VERTEX && nir_src_is_const(intrin->src[0])) {
1408 nir_variable *var = lookup_input(shader, nir_intrinsic_base(intrin));
1422 res = nir_unsigned_upper_bound(shader, range_ht, nir_get_ssa_scalar(intrin->src[0].ssa, 0), config);
1437 res = nir_unsigned_upper_bound(shader, range_ht, nir_get_ssa_scalar(intrin->src[0].ssa, 0), config);
1440 uint32_t src0 = nir_unsigned_upper_bound(shader, range_ht, nir_get_ssa_scalar(intrin->src[0].ssa, 0), config);
1441 uint32_t src1 = nir_unsigned_upper_bound(shader, range_ht, nir_get_ssa_scalar(intrin->src[1].ssa, 0), config);
1448 res = config->max_workgroup_invocations / MAX2(shader->info.tess.tcs_vertices_out, 1u);
1478 res = MAX2(res, nir_unsigned_upper_bound(shader, range_ht, defs[i], config));
1482 shader, range_ht, nir_get_ssa_scalar(src->src.ssa, 0), config));
1533 uint32_t src0 = nir_unsigned_upper_bound(shader, range_ht, nir_ssa_scalar_chase_alu_src(scalar, 0), config);
1536 src1 = nir_unsigned_upper_bound(shader, range_ht, nir_ssa_scalar_chase_alu_src(scalar, 1), config);
1538 src2 = nir_unsigned_upper_bound(shader, range_ht, nir_ssa_scalar_chase_alu_src(scalar, 2), config);
1676 nir_addition_might_overflow(nir_shader *shader, struct hash_table *range_ht,
1714 uint32_t ub = nir_unsigned_upper_bound(shader, range_ht, ssa, config);
1756 * question can eventually answered after the shader has been