Lines Matching refs:f16
841 * Let f16 be a float16 value. The sign, exponent, and mantissa
910 * The resultant f16 will also be NaN.
1029 /* uvec2 f16; */
1030 ir_variable *f16 = factory.make_temp(glsl_type::uvec2_type,
1049 /* Set f16's exponent and mantissa bits.
1051 * f16.x = pack_half_1x16_nosign(e.x, m.x);
1052 * f16.y = pack_half_1y16_nosign(e.y, m.y);
1054 factory.emit(assign(f16, pack_half_1x16_nosign(swizzle_x(f),
1058 factory.emit(assign(f16, pack_half_1x16_nosign(swizzle_y(f),
1063 /* Set f16's sign bits.
1065 * f16 |= (f32 & (1u << 31u) >> 16u;
1068 assign(f16, bit_or(f16,
1073 /* return (f16.y << 16u) | f16.x; */
1074 ir_rvalue *result = bit_or(lshift(swizzle_y(f16),
1076 swizzle_x(f16));
1122 * Let f16 be a float16 value. The sign, exponent, and mantissa
1152 * Our task is to compute s32, e32, m32 given f16. Since this function
1159 /* Case 1) f16 is zero or subnormal.
1163 * f32 = f16 (20)
1175 /* Case 2) f16 is normal.
1179 * f32 = f16 (30)
1203 /* Case 3) f16 is infinite. */
1208 /* Case 4) f16 is NaN. */
1244 * uvec2 f16 = uvec2(u.x & 0xffff, u.y >> 16);
1246 ir_variable *f16 = factory.make_temp(glsl_type::uvec2_type,
1248 factory.emit(assign(f16, unpack_uint_to_uvec2(uint_rval)));
1254 /* Get f16's unshifted exponent bits.
1256 * uvec2 e = f16 & 0x7c00u;
1260 factory.emit(assign(e, bit_and(f16, constant(0x7c00u))));
1262 /* Get f16's unshifted mantissa bits.
1264 * uvec2 m = f16 & 0x03ffu;
1268 factory.emit(assign(m, bit_and(f16, constant(0x03ffu))));
1284 * f32 |= (f16 & 0x8000u) << 16u;
1287 lshift(bit_and(f16,