Lines Matching refs:pipeline
71 pack_blend(struct v3dv_pipeline *pipeline,
81 pipeline->blend.enables = 0;
82 pipeline->blend.color_write_masks = 0; /* All channels enabled */
87 assert(pipeline->subpass);
88 if (pipeline->subpass->color_count == 0)
91 assert(pipeline->subpass->color_count == cb_info->attachmentCount);
93 pipeline->blend.needs_color_constants = false;
95 for (uint32_t i = 0; i < pipeline->subpass->color_count; i++) {
100 pipeline->subpass->color_attachments[i].attachment;
110 &pipeline->pass->attachments[attachment_idx].desc;
115 pipeline->blend.enables |= rt_mask;
117 v3dvx_pack(pipeline->blend.cfg[i], BLEND_CFG, config) {
123 &pipeline->blend.needs_color_constants);
126 &pipeline->blend.needs_color_constants);
131 &pipeline->blend.needs_color_constants);
134 &pipeline->blend.needs_color_constants);
138 pipeline->blend.color_write_masks = color_write_masks;
145 pack_cfg_bits(struct v3dv_pipeline *pipeline,
152 assert(sizeof(pipeline->cfg_bits) == cl_packet_length(CFG_BITS));
154 pipeline->msaa =
157 v3dvx_pack(pipeline->cfg_bits, CFG_BITS, config) {
189 pipeline->msaa) ? 1 : 0;
210 config.blend_enable = pipeline->blend.enables != 0;
214 pipeline->subpass->ds_attachment.attachment != VK_ATTACHMENT_UNUSED;
223 /* EZ state will be updated at draw time based on bound pipeline state */
230 pipeline->z_updates_enable = config.z_updates_enable;
260 pack_single_stencil_cfg(struct v3dv_pipeline *pipeline,
282 pipeline->dynamic_state.mask & V3DV_DYNAMIC_STENCIL_WRITE_MASK ?
286 pipeline->dynamic_state.mask & V3DV_DYNAMIC_STENCIL_COMPARE_MASK ?
290 pipeline->dynamic_state.mask & V3DV_DYNAMIC_STENCIL_COMPARE_MASK ?
307 pack_stencil_cfg(struct v3dv_pipeline *pipeline,
310 assert(sizeof(pipeline->stencil_cfg) == 2 * cl_packet_length(STENCIL_CFG));
315 if (pipeline->subpass->ds_attachment.attachment == VK_ATTACHMENT_UNUSED)
327 if ((pipeline->dynamic_state.mask & dynamic_stencil_states) ||
334 pipeline->emit_stencil_cfg[0] = true;
336 pack_single_stencil_cfg(pipeline, pipeline->stencil_cfg[0],
339 pipeline->emit_stencil_cfg[1] = true;
340 pack_single_stencil_cfg(pipeline, pipeline->stencil_cfg[0],
342 pack_single_stencil_cfg(pipeline, pipeline->stencil_cfg[1],
348 v3dX(pipeline_pack_state)(struct v3dv_pipeline *pipeline,
356 pack_blend(pipeline, cb_info);
357 pack_cfg_bits(pipeline, ds_info, rs_info, pv_info, ls_info, ms_info);
358 pack_stencil_cfg(pipeline, ds_info);
362 pack_shader_state_record(struct v3dv_pipeline *pipeline)
364 assert(sizeof(pipeline->shader_state_record) ==
368 pipeline->shared_data->variants[BROADCOM_SHADER_FRAGMENT]->prog_data.fs;
371 pipeline->shared_data->variants[BROADCOM_SHADER_VERTEX]->prog_data.vs;
374 pipeline->shared_data->variants[BROADCOM_SHADER_VERTEX_BIN]->prog_data.vs;
380 * pipeline (like viewport), . Would need to be filled later, so we are
383 v3dvx_pack(pipeline->shader_state_record, GL_SHADER_STATE_RECORD, shader) {
386 if (!pipeline->has_gs) {
388 pipeline->topology == PIPE_PRIM_POINTS;
391 pipeline->shared_data->variants[BROADCOM_SHADER_GEOMETRY]->prog_data.gs;
416 * rasterizationSamples from each pipeline’s
420 * So in this scenario, if the pipeline doesn't enable multiple samples
426 pipeline->sample_rate_shading ||
427 (pipeline->msaa && prog_data_fs->force_per_sample_msaa);
474 pipeline->vpm_cfg_bin.As;
476 pipeline->vpm_cfg.As;
479 pipeline->vpm_cfg_bin.Ve;
481 pipeline->vpm_cfg.Ve;
516 pack_vcm_cache_size(struct v3dv_pipeline *pipeline)
518 assert(sizeof(pipeline->vcm_cache_size) ==
521 v3dvx_pack(pipeline->vcm_cache_size, VCM_CACHE_SIZE, vcm) {
522 vcm.number_of_16_vertex_batches_for_binning = pipeline->vpm_cfg_bin.Vc;
523 vcm.number_of_16_vertex_batches_for_rendering = pipeline->vpm_cfg.Vc;
579 pack_shader_state_attribute_record(struct v3dv_pipeline *pipeline,
591 v3dvx_pack(&pipeline->vertex_attrs[index * packet_length],
601 attr.instance_divisor = MIN2(pipeline->vb[binding].instance_divisor,
603 attr.stride = pipeline->vb[binding].stride;
609 v3dX(pipeline_pack_compile_state)(struct v3dv_pipeline *pipeline,
613 pack_shader_state_record(pipeline);
614 pack_vcm_cache_size(pipeline);
616 pipeline->vb_count = vi_info->vertexBindingDescriptionCount;
621 pipeline->vb[desc->binding].stride = desc->stride;
622 pipeline->vb[desc->binding].instance_divisor = desc->inputRate;
630 pipeline->vb[desc->binding].instance_divisor = desc->divisor;
634 pipeline->va_count = 0;
636 pipeline->shared_data->variants[BROADCOM_SHADER_VERTEX]->prog_data.vs;
653 pipeline->va[driver_location].offset = desc->offset;
654 pipeline->va[driver_location].binding = desc->binding;
655 pipeline->va[driver_location].vk_format = desc->format;
657 pack_shader_state_attribute_record(pipeline, driver_location, desc);
659 pipeline->va_count++;