Lines Matching refs:tiling
47 const struct v3dv_frame_tiling *tiling,
57 assert(!tiling->double_buffer || !tiling->msaa);
59 config.width_in_pixels = tiling->width;
60 config.height_in_pixels = tiling->height;
61 config.number_of_render_targets = MAX2(tiling->render_target_count, 1);
62 config.multisample_mode_4x = tiling->msaa;
63 config.double_buffer_in_non_ms_mode = tiling->double_buffer;
64 config.maximum_bpp_of_all_render_targets = tiling->internal_bpp;
137 load.memory_format = slice->tiling;
139 if (slice->tiling == V3D_TILING_UIF_NO_XOR ||
140 slice->tiling == V3D_TILING_UIF_XOR) {
143 } else if (slice->tiling == V3D_TILING_RASTER) {
339 store.memory_format = slice->tiling;
341 if (slice->tiling == V3D_TILING_UIF_NO_XOR ||
342 slice->tiling == V3D_TILING_UIF_XOR) {
345 } else if (slice->tiling == V3D_TILING_RASTER) {
716 const struct v3dv_frame_tiling *tiling = &job->frame_tiling;
718 64 * layer * tiling->draw_tiles_x * tiling->draw_tiles_y;
726 tiling->tile_width * tiling->supertile_width;
728 tiling->tile_height * tiling->supertile_height;
799 const struct v3dv_frame_tiling *tiling = &job->frame_tiling;
819 assert(!tiling->msaa || !tiling->double_buffer);
824 config.multisample_mode_4x = tiling->msaa;
825 config.double_buffer_in_non_ms_mode = tiling->double_buffer;
826 config.maximum_bpp_of_all_render_targets = tiling->internal_bpp;
914 if (slice->tiling == V3D_TILING_UIF_NO_XOR ||
915 slice->tiling == V3D_TILING_UIF_XOR) {
993 config.total_frame_width_in_tiles = tiling->draw_tiles_x;
994 config.total_frame_height_in_tiles = tiling->draw_tiles_y;
996 config.supertile_width_in_tiles = tiling->supertile_width;
997 config.supertile_height_in_tiles = tiling->supertile_height;
1000 tiling->frame_width_in_supertiles;
1002 tiling->frame_height_in_supertiles;
1025 (i == 0 || v3dv_do_double_initial_tile_clear(tiling))) {
1643 /* FIXME: if our primary job tiling doesn't enable MSSA but any of the