Lines Matching defs:submit
596 * 1. It is a regular CL, in which case we will submit the job to the GPU,
1685 * when executed in a queue, would submit all the jobs in the referenced
3593 struct drm_v3d_submit_csd *submit = &job->csd.submit;
3599 submit->cfg[0] = wg_counts[0] << V3D_CSD_CFG012_WG_COUNT_SHIFT;
3600 submit->cfg[1] = wg_counts[1] << V3D_CSD_CFG012_WG_COUNT_SHIFT;
3601 submit->cfg[2] = wg_counts[2] << V3D_CSD_CFG012_WG_COUNT_SHIFT;
3603 submit->cfg[4] = DIV_ROUND_UP(info->wg_size, 16) *
3605 assert(submit->cfg[4] != ~0);
3653 struct drm_v3d_submit_csd *submit = &job->csd.submit;
3663 submit->cfg[0] |= group_count_x << V3D_CSD_CFG012_WG_COUNT_SHIFT;
3664 submit->cfg[1] |= group_count_y << V3D_CSD_CFG012_WG_COUNT_SHIFT;
3665 submit->cfg[2] |= group_count_z << V3D_CSD_CFG012_WG_COUNT_SHIFT;
3689 submit->cfg[3] |= (wgs_per_sg & 0xf) << V3D_CSD_CFG3_WGS_PER_SG_SHIFT;
3690 submit->cfg[3] |= (batches_per_sg - 1) << V3D_CSD_CFG3_BATCHES_PER_SG_M1_SHIFT;
3691 submit->cfg[3] |= (wg_size & 0xff) << V3D_CSD_CFG3_WG_SIZE_SHIFT;
3695 submit->cfg[4] = num_batches - 1;
3696 assert(submit->cfg[4] != ~0);
3701 submit->cfg[5] = cs_assembly_bo->offset + cs_variant->assembly_offset;
3702 submit->cfg[5] |= V3D_CSD_CFG5_PROPAGATE_NANS;
3704 submit->cfg[5] |= V3D_CSD_CFG5_SINGLE_SEG;
3706 submit->cfg[5] |= V3D_CSD_CFG5_THREADING;
3724 submit->cfg[6] = uniforms.bo->offset + uniforms.offset;
3799 * dispatch parameters, and submit a regular dispatch.
3811 * and we will rewrite the parts we need at submit time if the indirect