Lines Matching defs:ANYMUX
449 #define ANYMUX MUX_MASK(0, 7)
470 { 0, 47, ANYMUX, ANYMUX, V3D_QPU_A_FADD },
471 { 0, 47, ANYMUX, ANYMUX, V3D_QPU_A_FADDNF },
472 { 53, 55, ANYMUX, ANYMUX, V3D_QPU_A_VFPACK },
473 { 56, 56, ANYMUX, ANYMUX, V3D_QPU_A_ADD },
474 { 57, 59, ANYMUX, ANYMUX, V3D_QPU_A_VFPACK },
475 { 60, 60, ANYMUX, ANYMUX, V3D_QPU_A_SUB },
476 { 61, 63, ANYMUX, ANYMUX, V3D_QPU_A_VFPACK },
477 { 64, 111, ANYMUX, ANYMUX, V3D_QPU_A_FSUB },
478 { 120, 120, ANYMUX, ANYMUX, V3D_QPU_A_MIN },
479 { 121, 121, ANYMUX, ANYMUX, V3D_QPU_A_MAX },
480 { 122, 122, ANYMUX, ANYMUX, V3D_QPU_A_UMIN },
481 { 123, 123, ANYMUX, ANYMUX, V3D_QPU_A_UMAX },
482 { 124, 124, ANYMUX, ANYMUX, V3D_QPU_A_SHL },
483 { 125, 125, ANYMUX, ANYMUX, V3D_QPU_A_SHR },
484 { 126, 126, ANYMUX, ANYMUX, V3D_QPU_A_ASR },
485 { 127, 127, ANYMUX, ANYMUX, V3D_QPU_A_ROR },
487 { 128, 175, ANYMUX, ANYMUX, V3D_QPU_A_FMIN },
488 { 128, 175, ANYMUX, ANYMUX, V3D_QPU_A_FMAX },
489 { 176, 180, ANYMUX, ANYMUX, V3D_QPU_A_VFMIN },
491 { 181, 181, ANYMUX, ANYMUX, V3D_QPU_A_AND },
492 { 182, 182, ANYMUX, ANYMUX, V3D_QPU_A_OR },
493 { 183, 183, ANYMUX, ANYMUX, V3D_QPU_A_XOR },
495 { 184, 184, ANYMUX, ANYMUX, V3D_QPU_A_VADD },
496 { 185, 185, ANYMUX, ANYMUX, V3D_QPU_A_VSUB },
497 { 186, 186, 1 << 0, ANYMUX, V3D_QPU_A_NOT },
498 { 186, 186, 1 << 1, ANYMUX, V3D_QPU_A_NEG },
499 { 186, 186, 1 << 2, ANYMUX, V3D_QPU_A_FLAPUSH },
500 { 186, 186, 1 << 3, ANYMUX, V3D_QPU_A_FLBPUSH },
501 { 186, 186, 1 << 4, ANYMUX, V3D_QPU_A_FLPOP },
502 { 186, 186, 1 << 5, ANYMUX, V3D_QPU_A_RECIP },
503 { 186, 186, 1 << 6, ANYMUX, V3D_QPU_A_SETMSF },
504 { 186, 186, 1 << 7, ANYMUX, V3D_QPU_A_SETREVF },
529 { 187, 187, 1 << 3, ANYMUX, V3D_QPU_A_VPMSETUP, 33 },
531 { 188, 188, 1 << 0, ANYMUX, V3D_QPU_A_LDVPMV_IN, 40 },
532 { 188, 188, 1 << 0, ANYMUX, V3D_QPU_A_LDVPMV_OUT, 40 },
533 { 188, 188, 1 << 1, ANYMUX, V3D_QPU_A_LDVPMD_IN, 40 },
534 { 188, 188, 1 << 1, ANYMUX, V3D_QPU_A_LDVPMD_OUT, 40 },
535 { 188, 188, 1 << 2, ANYMUX, V3D_QPU_A_LDVPMP, 40 },
536 { 188, 188, 1 << 3, ANYMUX, V3D_QPU_A_RSQRT, 41 },
537 { 188, 188, 1 << 4, ANYMUX, V3D_QPU_A_EXP, 41 },
538 { 188, 188, 1 << 5, ANYMUX, V3D_QPU_A_LOG, 41 },
539 { 188, 188, 1 << 6, ANYMUX, V3D_QPU_A_SIN, 41 },
540 { 188, 188, 1 << 7, ANYMUX, V3D_QPU_A_RSQRT2, 41 },
541 { 189, 189, ANYMUX, ANYMUX, V3D_QPU_A_LDVPMG_IN, 40 },
542 { 189, 189, ANYMUX, ANYMUX, V3D_QPU_A_LDVPMG_OUT, 40 },
545 /* { 190, 191, ANYMUX, ANYMUX, V3D_QPU_A_VFMOVABSNEGNAB }, */
547 { 192, 239, ANYMUX, ANYMUX, V3D_QPU_A_FCMP },
548 { 240, 244, ANYMUX, ANYMUX, V3D_QPU_A_VFMAX },
550 { 245, 245, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FROUND },
551 { 245, 245, 1 << 3, ANYMUX, V3D_QPU_A_FTOIN },
552 { 245, 245, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FTRUNC },
553 { 245, 245, 1 << 7, ANYMUX, V3D_QPU_A_FTOIZ },
554 { 246, 246, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FFLOOR },
555 { 246, 246, 1 << 3, ANYMUX, V3D_QPU_A_FTOUZ },
556 { 246, 246, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FCEIL },
557 { 246, 246, 1 << 7, ANYMUX, V3D_QPU_A_FTOC },
559 { 247, 247, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FDX },
560 { 247, 247, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FDY },
563 { 248, 248, ANYMUX, ANYMUX, V3D_QPU_A_STVPMV },
564 { 248, 248, ANYMUX, ANYMUX, V3D_QPU_A_STVPMD },
565 { 248, 248, ANYMUX, ANYMUX, V3D_QPU_A_STVPMP },
567 { 252, 252, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_ITOF },
568 { 252, 252, 1 << 3, ANYMUX, V3D_QPU_A_CLZ },
569 { 252, 252, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_UTOF },
573 { 1, 1, ANYMUX, ANYMUX, V3D_QPU_M_ADD },
574 { 2, 2, ANYMUX, ANYMUX, V3D_QPU_M_SUB },
575 { 3, 3, ANYMUX, ANYMUX, V3D_QPU_M_UMUL24 },
576 { 4, 8, ANYMUX, ANYMUX, V3D_QPU_M_VFMUL },
577 { 9, 9, ANYMUX, ANYMUX, V3D_QPU_M_SMUL24 },
578 { 10, 10, ANYMUX, ANYMUX, V3D_QPU_M_MULTOP },
579 { 14, 14, ANYMUX, ANYMUX, V3D_QPU_M_FMOV },
580 { 15, 15, MUX_MASK(0, 3), ANYMUX, V3D_QPU_M_FMOV },
582 { 15, 15, 1 << 7, ANYMUX, V3D_QPU_M_MOV },
583 { 16, 63, ANYMUX, ANYMUX, V3D_QPU_M_FMUL },