Lines Matching defs:qinst
70 static struct qinst *
74 struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef);
76 return qinst;
79 static struct qinst *
80 new_qpu_nop_before(struct qinst *inst)
82 struct qinst *q = vir_nop();
132 is_no_op_mov(struct qinst *qinst)
137 if (qinst->qpu.type != V3D_QPU_INSTR_TYPE_ALU ||
138 qinst->qpu.alu.mul.op != V3D_QPU_M_MOV ||
139 qinst->qpu.alu.add.op != V3D_QPU_A_NOP ||
140 memcmp(&qinst->qpu.sig, &no_sig, sizeof(no_sig)) != 0) {
145 enum v3d_qpu_waddr waddr = qinst->qpu.alu.mul.waddr;
146 if (qinst->qpu.alu.mul.magic_write) {
150 if (qinst->qpu.alu.mul.a !=
157 switch (qinst->qpu.alu.mul.a) {
159 raddr = qinst->qpu.raddr_a;
162 raddr = qinst->qpu.raddr_b;
174 if (qinst->qpu.alu.mul.a_unpack != V3D_QPU_UNPACK_NONE ||
175 qinst->qpu.alu.mul.output_pack != V3D_QPU_PACK_NONE ||
176 qinst->qpu.flags.mc != V3D_QPU_COND_NONE ||
177 qinst->qpu.flags.mpf != V3D_QPU_PF_NONE ||
178 qinst->qpu.flags.muf != V3D_QPU_UF_NONE) {
192 vir_for_each_inst_safe(qinst, block) {
194 fprintf(stderr, "translating qinst to qpu: ");
195 vir_dump_inst(c, qinst);
199 struct qinst *temp;
201 if (vir_has_uniform(qinst))
204 int nsrc = vir_get_nsrc(qinst);
205 struct qpu_reg src[ARRAY_SIZE(qinst->src)];
207 int index = qinst->src[i].index;
208 switch (qinst->src[i].file) {
210 src[i] = qpu_reg(qinst->src[i].index);
213 src[i] = qpu_magic(qinst->src[i].index);
232 assert((int)qinst->src[i].index >=
235 last_vpm_read_index = qinst->src[i].index;
237 temp = new_qpu_nop_before(qinst);
246 switch (qinst->dst.file) {
252 dst = qpu_reg(qinst->dst.index);
256 dst = qpu_magic(qinst->dst.index);
260 dst = temp_registers[qinst->dst.index];
273 if (qinst->qpu.type == V3D_QPU_INSTR_TYPE_ALU) {
274 if (qinst->qpu.sig.ldunif || qinst->qpu.sig.ldunifa) {
275 assert(qinst->qpu.alu.add.op == V3D_QPU_A_NOP);
276 assert(qinst->qpu.alu.mul.op == V3D_QPU_M_NOP);
282 if (qinst->qpu.sig.ldunif) {
283 qinst->qpu.sig.ldunif = false;
284 qinst->qpu.sig.ldunifrf = true;
286 qinst->qpu.sig.ldunifa = false;
287 qinst->qpu.sig.ldunifarf = true;
289 qinst->qpu.sig_addr = dst.index;
290 qinst->qpu.sig_magic = dst.magic;
293 &qinst->qpu.sig)) {
294 assert(qinst->qpu.alu.add.op == V3D_QPU_A_NOP);
295 assert(qinst->qpu.alu.mul.op == V3D_QPU_M_NOP);
297 qinst->qpu.sig_addr = dst.index;
298 qinst->qpu.sig_magic = dst.magic;
299 } else if (qinst->qpu.alu.add.op != V3D_QPU_A_NOP) {
300 assert(qinst->qpu.alu.mul.op == V3D_QPU_M_NOP);
302 set_src(&qinst->qpu,
303 &qinst->qpu.alu.add.a, src[0]);
306 set_src(&qinst->qpu,
307 &qinst->qpu.alu.add.b, src[1]);
310 qinst->qpu.alu.add.waddr = dst.index;
311 qinst->qpu.alu.add.magic_write = dst.magic;
314 set_src(&qinst->qpu,
315 &qinst->qpu.alu.mul.a, src[0]);
318 set_src(&qinst->qpu,
319 &qinst->qpu.alu.mul.b, src[1]);
322 qinst->qpu.alu.mul.waddr = dst.index;
323 qinst->qpu.alu.mul.magic_write = dst.magic;
325 if (is_no_op_mov(qinst)) {
326 vir_remove_instruction(c, qinst);
331 assert(qinst->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH);