Lines Matching refs:nodes
55 get_temp_class_bits(struct v3d_ra_node_info *nodes,
58 return nodes->info[temp_to_node(temp)].class_bits;
62 set_temp_class_bits(struct v3d_ra_node_info *nodes,
65 nodes->info[temp_to_node(temp)].class_bits = class_bits;
86 assert(temp < c->num_temps && temp < c->nodes.alloc_count);
87 return choose_reg_class(c, get_temp_class_bits(&c->nodes, temp));
326 if (c->num_temps < c->nodes.alloc_count)
329 c->nodes.alloc_count *= 2;
330 c->nodes.info = reralloc_array_size(c,
331 c->nodes.info,
332 sizeof(c->nodes.info[0]),
333 c->nodes.alloc_count + ACC_COUNT);
337 * list updated during the spilling process, which generates new temps/nodes.
348 c->nodes.info[node].class_bits = class_bits;
349 c->nodes.info[node].priority = 0;
510 uint8_t class_bits = get_temp_class_bits(&c->nodes,
697 c->nodes.info[spill_node].class_bits);
746 c->nodes.info[node_i].priority =
774 struct v3d_ra_node_info *nodes;
873 if (v3d_ra_favor_accum(v3d_ra, regs, v3d_ra->nodes->info[n].priority) &&
988 set_temp_class_bits(&c->nodes, inst->dst.index,
1003 set_temp_class_bits(&c->nodes, inst->dst.index,
1044 get_temp_class_bits(&c->nodes, inst->dst.index) &
1046 set_temp_class_bits(&c->nodes, inst->dst.index,
1055 set_temp_class_bits(&c->nodes, inst->dst.index,
1065 set_temp_class_bits(&c->nodes, i,
1081 c->nodes = (struct v3d_ra_node_info) {
1083 .info = ralloc_array_size(c, sizeof(c->nodes.info[0]),
1093 .nodes = &c->nodes,
1113 /* Make some fixed nodes for the accumulators, which we will need to
1115 * switches. We could represent these as classes for the nodes to
1123 c->nodes.info[i].priority = 0;
1124 c->nodes.info[i].class_bits = 0;
1127 c->nodes.info[i].priority =
1129 c->nodes.info[i].class_bits = CLASS_BITS_ANY;
1214 ralloc_free(c->nodes.info);
1215 c->nodes.info = NULL;
1216 c->nodes.alloc_count = 0;