Lines Matching defs:inst
31 vir_get_nsrc(struct qinst *inst)
33 switch (inst->qpu.type) {
37 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP)
38 return v3d_qpu_add_op_num_src(inst->qpu.alu.add.op);
40 return v3d_qpu_mul_op_num_src(inst->qpu.alu.mul.op);
51 vir_has_side_effects(struct v3d_compile *c, struct qinst *inst)
53 switch (inst->qpu.type) {
57 switch (inst->qpu.alu.add.op) {
71 switch (inst->qpu.alu.mul.op) {
79 if (inst->qpu.sig.ldtmu ||
80 inst->qpu.sig.ldvary ||
81 inst->qpu.sig.ldtlbu ||
82 inst->qpu.sig.ldtlb ||
83 inst->qpu.sig.wrtmuc ||
84 inst->qpu.sig.thrsw) {
96 if (inst->qpu.sig.ldunifa || inst->qpu.sig.ldunifarf)
103 vir_is_raw_mov(struct qinst *inst)
105 if (inst->qpu.type != V3D_QPU_INSTR_TYPE_ALU ||
106 (inst->qpu.alu.mul.op != V3D_QPU_M_FMOV &&
107 inst->qpu.alu.mul.op != V3D_QPU_M_MOV)) {
111 if (inst->qpu.alu.add.output_pack != V3D_QPU_PACK_NONE ||
112 inst->qpu.alu.mul.output_pack != V3D_QPU_PACK_NONE) {
116 if (inst->qpu.alu.add.a_unpack != V3D_QPU_UNPACK_NONE ||
117 inst->qpu.alu.add.b_unpack != V3D_QPU_UNPACK_NONE ||
118 inst->qpu.alu.mul.a_unpack != V3D_QPU_UNPACK_NONE ||
119 inst->qpu.alu.mul.b_unpack != V3D_QPU_UNPACK_NONE) {
123 if (inst->qpu.flags.ac != V3D_QPU_COND_NONE ||
124 inst->qpu.flags.mc != V3D_QPU_COND_NONE)
131 vir_is_add(struct qinst *inst)
133 return (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
134 inst->qpu.alu.add.op != V3D_QPU_A_NOP);
138 vir_is_mul(struct qinst *inst)
140 return (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
141 inst->qpu.alu.mul.op != V3D_QPU_M_NOP);
145 vir_is_tex(const struct v3d_device_info *devinfo, struct qinst *inst)
147 if (inst->dst.file == QFILE_MAGIC)
148 return v3d_qpu_magic_waddr_is_tmu(devinfo, inst->dst.index);
150 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
151 inst->qpu.alu.add.op == V3D_QPU_A_TMUWT) {
159 vir_writes_r3(const struct v3d_device_info *devinfo, struct qinst *inst)
161 for (int i = 0; i < vir_get_nsrc(inst); i++) {
162 switch (inst->src[i].file) {
170 if (devinfo->ver < 41 && (inst->qpu.sig.ldvary ||
171 inst->qpu.sig.ldtlb ||
172 inst->qpu.sig.ldtlbu ||
173 inst->qpu.sig.ldvpm)) {
181 vir_writes_r4(const struct v3d_device_info *devinfo, struct qinst *inst)
183 switch (inst->dst.file) {
185 switch (inst->dst.index) {
198 if (devinfo->ver < 41 && inst->qpu.sig.ldtmu)
205 vir_set_unpack(struct qinst *inst, int src,
210 if (vir_is_add(inst)) {
212 inst->qpu.alu.add.a_unpack = unpack;
214 inst->qpu.alu.add.b_unpack = unpack;
216 assert(vir_is_mul(inst));
218 inst->qpu.alu.mul.a_unpack = unpack;
220 inst->qpu.alu.mul.b_unpack = unpack;
225 vir_set_pack(struct qinst *inst, enum v3d_qpu_output_pack pack)
227 if (vir_is_add(inst)) {
228 inst->qpu.alu.add.output_pack = pack;
230 assert(vir_is_mul(inst));
231 inst->qpu.alu.mul.output_pack = pack;
236 vir_set_cond(struct qinst *inst, enum v3d_qpu_cond cond)
238 if (vir_is_add(inst)) {
239 inst->qpu.flags.ac = cond;
241 assert(vir_is_mul(inst));
242 inst->qpu.flags.mc = cond;
247 vir_get_cond(struct qinst *inst)
249 assert(inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU);
251 if (vir_is_add(inst))
252 return inst->qpu.flags.ac;
253 else if (vir_is_mul(inst))
254 return inst->qpu.flags.mc;
260 vir_set_pf(struct v3d_compile *c, struct qinst *inst, enum v3d_qpu_pf pf)
263 if (vir_is_add(inst)) {
264 inst->qpu.flags.apf = pf;
266 assert(vir_is_mul(inst));
267 inst->qpu.flags.mpf = pf;
272 vir_set_uf(struct v3d_compile *c, struct qinst *inst, enum v3d_qpu_uf uf)
275 if (vir_is_add(inst)) {
276 inst->qpu.flags.auf = uf;
278 assert(vir_is_mul(inst));
279 inst->qpu.flags.muf = uf;
285 vir_channels_written(struct qinst *inst)
287 if (vir_is_mul(inst)) {
288 switch (inst->dst.pack) {
302 switch (inst->dst.pack) {
362 struct qinst *inst = calloc(1, sizeof(*inst));
364 inst->qpu = v3d_qpu_nop();
365 inst->qpu.alu.add.op = op;
367 inst->dst = dst;
368 inst->src[0] = src0;
369 inst->src[1] = src1;
370 inst->uniform = ~0;
372 inst->ip = -1;
374 return inst;
380 struct qinst *inst = calloc(1, sizeof(*inst));
382 inst->qpu = v3d_qpu_nop();
383 inst->qpu.alu.mul.op = op;
385 inst->dst = dst;
386 inst->src[0] = src0;
387 inst->src[1] = src1;
388 inst->uniform = ~0;
390 inst->ip = -1;
392 return inst;
398 struct qinst *inst = calloc(1, sizeof(*inst));
400 inst->qpu = v3d_qpu_nop();
401 inst->qpu.type = V3D_QPU_INSTR_TYPE_BRANCH;
402 inst->qpu.branch.cond = cond;
403 inst->qpu.branch.msfign = V3D_QPU_MSFIGN_NONE;
404 inst->qpu.branch.bdi = V3D_QPU_BRANCH_DEST_REL;
405 inst->qpu.branch.ub = true;
406 inst->qpu.branch.bdu = V3D_QPU_BRANCH_DEST_REL;
408 inst->dst = vir_nop_reg();
409 inst->uniform = vir_get_uniform_index(c, QUNIFORM_CONSTANT, 0);
411 inst->ip = -1;
413 return inst;
417 vir_emit(struct v3d_compile *c, struct qinst *inst)
419 inst->ip = -1;
423 list_add(&inst->link, c->cursor.link);
426 list_addtail(&inst->link, c->cursor.link);
430 c->cursor = vir_after_inst(inst);
434 /* Updates inst to write to a new temporary, emits it, and notes the def. */
436 vir_emit_def(struct v3d_compile *c, struct qinst *inst)
438 assert(inst->dst.file == QFILE_NULL);
443 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU) {
444 assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP ||
445 v3d_qpu_add_op_has_dst(inst->qpu.alu.add.op));
446 assert(inst->qpu.alu.mul.op == V3D_QPU_M_NOP ||
447 v3d_qpu_mul_op_has_dst(inst->qpu.alu.mul.op));
450 inst->dst = vir_get_temp(c);
452 if (inst->dst.file == QFILE_TEMP)
453 c->defs[inst->dst.index] = inst;
455 vir_emit(c, inst);
457 return inst->dst;
461 vir_emit_nondef(struct v3d_compile *c, struct qinst *inst)
463 if (inst->dst.file == QFILE_TEMP)
464 c->defs[inst->dst.index] = NULL;
466 vir_emit(c, inst);
468 return inst;
1060 vir_for_each_inst_inorder(inst, c)
1202 nir_instr_as_constant_ubo_load(nir_instr *inst)
1204 if (inst->type != nir_instr_type_intrinsic)
1207 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(inst);
1231 nir_instr *inst = &ref->instr;
1234 inst = next_inst ? next_inst : nir_instr_next(inst);
1235 if (!inst)
1240 if (inst->type != nir_instr_type_intrinsic)
1243 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(inst);
1303 if (!tmp || tmp == inst)
1356 tmp = inst;
1383 next_inst = nir_instr_next(inst);
1386 exec_node_remove(&inst->node);
1388 exec_node_insert_node_before(&pos->node, &inst->node);
1390 exec_node_insert_after(&pos->node, &inst->node);
1406 nir_foreach_instr_safe(inst, block) {
1408 nir_instr_as_constant_ubo_load(inst);
1465 nir_foreach_instr_safe(inst, block) {
1466 if (inst->type != nir_instr_type_intrinsic)
1470 nir_instr_as_intrinsic(inst);
1668 "%s shader: %d inst, %d threads, %d loops, "
1670 "%d sfu-stalls, %d inst-and-stalls, %d nops",
2029 vir_for_each_inst(inst, c->cur_block) {
2030 if (&inst->link == c->cursor.link) {
2039 list_for_each_entry_from_rev(struct qinst, inst, c->cursor.link->prev,
2041 if ((inst->qpu.sig.ldunif || inst->qpu.sig.ldunifrf) &&
2042 inst->uniform == index) {
2043 prev_inst = inst;
2055 list_for_each_entry_from(struct qinst, inst, prev_inst->link.next,
2057 if (inst->dst.file == prev_inst->dst.file &&
2058 inst->dst.index == prev_inst->dst.index) {
2085 struct qinst *inst = vir_NOP(c);
2086 inst->qpu.sig.ldunif = true;
2087 inst->uniform = index;
2088 inst->dst = vir_get_temp(c);
2089 c->defs[inst->dst.index] = inst;
2090 return inst->dst;