Lines Matching refs:qpu
37 #include "qpu/qpu_disasm.h"
158 add_read_dep(state, state->last_rf[n->inst->qpu.raddr_a], n);
161 if (!n->inst->qpu.sig.small_imm) {
163 state->last_rf[n->inst->qpu.raddr_b], n);
282 struct v3d_qpu_instr *inst = &qinst->qpu;
526 const struct v3d_qpu_instr *inst = &qinst->qpu;
566 const struct v3d_qpu_instr *inst = &qinst->qpu;
1070 if (prev_inst->inst->qpu.sig.thrsw)
1080 const struct v3d_qpu_instr *inst = &n->inst->qpu;
1185 if ((prev_inst->inst->qpu.sig.ldunifa ||
1186 prev_inst->inst->qpu.sig.ldunifarf) &&
1212 &prev_inst->inst->qpu, inst)) {
1264 if (chosen && chosen->inst->qpu.sig.ldvary) {
1338 v3d_qpu_dump(devinfo, &n->inst->qpu);
1348 v3d_qpu_dump(devinfo, &child->inst->qpu);
1399 const struct v3d_qpu_instr *before_inst = &before->inst->qpu;
1400 const struct v3d_qpu_instr *after_inst = &after->inst->qpu;
1492 update_scoreboard_for_chosen(scoreboard, &inst->qpu, c->devinfo);
1517 const struct v3d_qpu_instr *inst = &qinst->qpu;
1591 qinst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
1592 (v3d_qpu_magic_waddr_is_sfu(qinst->qpu.alu.add.waddr) ||
1593 v3d_qpu_magic_waddr_is_sfu(qinst->qpu.alu.mul.waddr))) {
1597 if (slot > 0 && qinst->qpu.sig.ldvary)
1614 if (v3d_qpu_writes_unifa(c->devinfo, &qinst->qpu))
1642 if (qinst->qpu.sig.thrsw)
1655 if (qpu_inst_is_tlb(&qinst->qpu))
1661 if (qinst->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH)
1674 if (v3d_qpu_writes_tmu(c->devinfo, &qinst->qpu) ||
1675 qinst->qpu.sig.wrtmuc) {
1684 if (v3d_qpu_waits_on_tmu(&qinst->qpu))
1690 if (v3d_qpu_writes_accum(c->devinfo, &qinst->qpu))
1696 if (qinst->qpu.alu.mul.op == V3D_QPU_M_MULTOP)
1702 if (v3d_qpu_writes_flags(&qinst->qpu))
1710 if (qinst->qpu.alu.add.op == V3D_QPU_A_BARRIERID)
1761 assert(inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU);
1762 assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP);
1763 assert(inst->qpu.alu.mul.op == V3D_QPU_M_NOP);
1789 struct v3d_qpu_sig sig = prev_inst->qpu.sig;
1832 merge_inst->qpu.sig.thrsw = true;
1855 second_inst->qpu.sig.thrsw = true;
1879 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH)
1882 if (inst->qpu.sig.thrsw)
1885 if (v3d_qpu_writes_unifa(c->devinfo, &inst->qpu))
1900 assert(inst->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH);
1914 inst->qpu.branch.msfign == V3D_QPU_MSFIGN_NONE ||
1915 inst->qpu.branch.cond == V3D_QPU_BRANCH_COND_ALWAYS ||
1916 inst->qpu.branch.cond == V3D_QPU_BRANCH_COND_A0 ||
1917 inst->qpu.branch.cond == V3D_QPU_BRANCH_COND_NA0;
1930 assert(prev_inst->qpu.type != V3D_QPU_INSTR_TYPE_BRANCH);
1961 if (v3d_qpu_writes_flags(&prev_inst->qpu) &&
1962 inst->qpu.branch.cond != V3D_QPU_BRANCH_COND_ALWAYS) {
1972 if (prev_prev_inst->qpu.type == V3D_QPU_INSTR_TYPE_ALU &&
1973 prev_prev_inst->qpu.alu.add.op == V3D_QPU_A_SETMSF) {
2103 if (!prev || prev->qpu.type != V3D_QPU_INSTR_TYPE_ALU)
2106 if (prev->qpu.alu.add.op != V3D_QPU_A_NOP) {
2107 if (prev->qpu.alu.add.magic_write == ldvary_magic &&
2108 prev->qpu.alu.add.waddr == ldvary_index) {
2113 if (prev->qpu.alu.mul.op != V3D_QPU_M_NOP) {
2114 if (prev->qpu.alu.mul.magic_write == ldvary_magic &&
2115 prev->qpu.alu.mul.waddr == ldvary_index) {
2121 if (v3d_qpu_sig_writes_address(c->devinfo, &prev->qpu.sig))
2125 struct v3d_qpu_sig new_sig = prev->qpu.sig;
2133 if (v3d_qpu_writes_flags(&prev->qpu))
2135 if (v3d_qpu_reads_flags(&prev->qpu))
2147 prev->qpu.sig.ldvary = true;
2148 prev->qpu.sig_magic = ldvary_magic;
2149 prev->qpu.sig_addr = ldvary_index;
2188 struct v3d_qpu_instr *inst = &qinst->qpu;
2220 inst, &merge->inst->qpu);
2229 v3d_qpu_dump(devinfo, &merge->inst->qpu);
2377 if (!v3d_qpu_is_nop(&inst->qpu))
2383 if (inst->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH) {
2388 assert(branch && branch->qpu.type == V3D_QPU_INSTR_TYPE_BRANCH);
2400 branch->qpu.branch.offset =
2424 if (branch->qpu.branch.cond == V3D_QPU_BRANCH_COND_ALWAYS) {
2435 memcpy(&slot->qpu, &s_inst->qpu,
2436 sizeof(slot->qpu));
2441 branch->qpu.branch.offset +=
2482 v3d_qpu_dump(devinfo, &qinst->qpu);
2507 thrsw->qpu.sig.thrsw = true;