Lines Matching refs:src
176 v3d_get_op_for_atomic_add(nir_intrinsic_instr *instr, unsigned src)
178 if (nir_src_is_const(instr->src[src])) {
179 int64_t add_val = nir_src_as_int(instr->src[src]);
376 struct qreg data = ntq_get_src(c, instr->src[0], i);
387 *type_size = nir_src_bit_size(instr->src[0]) / 8;
418 struct qreg data = ntq_get_src(c, instr->src[1 + has_index], 0);
425 data = ntq_get_src(c, instr->src[2 + has_index], 0);
456 ntq_get_src(c, instr->src[offset_src], 0);
478 struct qreg data = ntq_get_src(c, instr->src[offset_src], 0);
555 bool dynamic_src = !nir_src_is_const(instr->src[offset_src]);
558 const_offset = nir_src_as_uint(instr->src[offset_src]);
567 uint32_t index = nir_src_as_uint(instr->src[0]);
598 nir_src_as_uint(instr->src[is_store ?
848 ntq_get_src(struct v3d_compile *c, nir_src src, int i)
851 if (src.is_ssa) {
852 assert(i < src.ssa->num_components);
854 entry = _mesa_hash_table_search(c->def_ht, src.ssa);
857 entry = _mesa_hash_table_search(c->def_ht, src.ssa);
860 nir_register *reg = src.reg.reg;
862 assert(src.reg.base_offset == 0);
877 unsigned src)
881 struct qreg r = ntq_get_src(c, instr->src[src].src,
882 instr->src[src].swizzle[chan]);
884 assert(!instr->src[src].abs);
885 assert(!instr->src[src].negate);
905 lod = ntq_get_src(c, instr->src[lod_index].src, 0);
975 ntq_fsincos(struct v3d_compile *c, struct qreg src, bool is_cos)
977 struct qreg input = vir_FMUL(c, src, vir_uniform_f(c, 1.0f / M_PI));
989 ntq_fsign(struct v3d_compile *c, struct qreg src)
994 vir_set_pf(c, vir_FMOV_dest(c, vir_nop_reg(), src), V3D_QPU_PF_PUSHZ);
996 vir_set_pf(c, vir_FMOV_dest(c, vir_nop_reg(), src), V3D_QPU_PF_PUSHN);
1231 /* Finds an ALU instruction that generates our src value that could
1235 ntq_get_alu_parent(nir_src src)
1237 if (!src.is_ssa || src.ssa->parent_instr->type != nir_instr_type_alu)
1239 nir_alu_instr *instr = nir_instr_as_alu(src.ssa->parent_instr);
1245 * src.
1248 if (!instr->src[i].src.is_ssa)
1257 ntq_emit_bool_to_cond(struct v3d_compile *c, nir_src src)
1259 struct qreg qsrc = ntq_get_src(c, src, 0);
1260 /* skip if we already have src in the flags */
1264 nir_alu_instr *compare = ntq_get_alu_parent(src);
1274 vir_set_pf(c, vir_MOV_dest(c, vir_nop_reg(), ntq_get_src(c, src, 0)),
1437 srcs[i] = ntq_get_src(c, instr->src[i].src,
1438 instr->src[i].swizzle[0]);
1445 /* General case: We can just grab the one used channel per src. */
1446 struct qreg src[nir_op_infos[instr->op].num_inputs];
1448 src[i] = ntq_get_alu_src(c, instr, i);
1455 result = vir_MOV(c, src[0]);
1459 result = vir_XOR(c, src[0], vir_uniform_ui(c, 1 << 31));
1462 result = vir_NEG(c, src[0]);
1466 result = vir_FMUL(c, src[0], src[1]);
1469 result = vir_FADD(c, src[0], src[1]);
1472 result = vir_FSUB(c, src[0], src[1]);
1475 result = vir_FMIN(c, src[0], src[1]);
1478 result = vir_FMAX(c, src[0], src[1]);
1482 nir_alu_instr *src0_alu = ntq_get_alu_parent(instr->src[0].src);
1486 result = vir_FTOIZ(c, src[0]);
1492 result = vir_FTOUZ(c, src[0]);
1495 result = vir_ITOF(c, src[0]);
1498 result = vir_UTOF(c, src[0]);
1501 result = vir_AND(c, src[0], vir_uniform_f(c, 1.0));
1504 result = vir_AND(c, src[0], vir_uniform_ui(c, 1));
1509 assert(nir_src_bit_size(instr->src[0].src) == 32);
1510 result = vir_FMOV(c, src[0]);
1515 assert(nir_src_bit_size(instr->src[0].src) == 32);
1516 result = f2f16_rtz(c, src[0]);
1520 assert(nir_src_bit_size(instr->src[0].src) == 16);
1521 result = vir_FMOV(c, src[0]);
1526 uint32_t bit_size = nir_src_bit_size(instr->src[0].src);
1531 * the conversion manually by truncating the src.
1533 result = vir_AND(c, src[0], vir_uniform_ui(c, 0xffff));
1535 struct qreg tmp = vir_AND(c, src[0],
1543 uint32_t bit_size = nir_src_bit_size(instr->src[0].src);
1548 * manually by truncating the src. For the 8-bit case, we
1553 result = vir_AND(c, src[0], vir_uniform_ui(c, 0xffff));
1555 result = vir_AND(c, src[0], vir_uniform_ui(c, 0xff));
1561 assert(nir_src_bit_size(instr->src[0].src) == 32 ||
1562 nir_src_bit_size(instr->src[0].src) == 16);
1565 * manually by truncating the src.
1567 result = vir_AND(c, src[0], vir_uniform_ui(c, 0xff));
1571 uint32_t bit_size = nir_src_bit_size(instr->src[0].src);
1575 * from the src but we make sure to clear any garbage bits that
1576 * may be present in the invalid src bits.
1579 result = vir_AND(c, src[0], vir_uniform_ui(c, mask));
1584 uint32_t bit_size = nir_src_bit_size(instr->src[0].src);
1588 struct qreg tmp = vir_AND(c, src[0],
1596 result = vir_ADD(c, src[0], src[1]);
1599 result = vir_SHR(c, src[0], src[1]);
1602 result = vir_SUB(c, src[0], src[1]);
1605 result = vir_ASR(c, src[0], src[1]);
1608 result = vir_SHL(c, src[0], src[1]);
1611 result = vir_MIN(c, src[0], src[1]);
1614 result = vir_UMIN(c, src[0], src[1]);
1617 result = vir_MAX(c, src[0], src[1]);
1620 result = vir_UMAX(c, src[0], src[1]);
1623 result = vir_AND(c, src[0], src[1]);
1626 result = vir_OR(c, src[0], src[1]);
1629 result = vir_XOR(c, src[0], src[1]);
1632 result = vir_NOT(c, src[0]);
1636 result = vir_SUB(c, vir_uniform_ui(c, 31), vir_CLZ(c, src[0]));
1640 result = vir_UMUL(c, src[0], src[1]);
1680 ntq_emit_bool_to_cond(c, instr->src[0].src),
1681 src[1], src[2]));
1685 vir_set_pf(c, vir_MOV_dest(c, vir_nop_reg(), src[0]),
1688 src[1], src[2]));
1692 result = vir_RECIP(c, src[0]);
1695 result = vir_RSQRT(c, src[0]);
1698 result = vir_EXP(c, src[0]);
1701 result = vir_LOG(c, src[0]);
1705 result = vir_FCEIL(c, src[0]);
1708 result = vir_FFLOOR(c, src[0]);
1711 result = vir_FROUND(c, src[0]);
1714 result = vir_FTRUNC(c, src[0]);
1718 result = ntq_fsincos(c, src[0], false);
1721 result = ntq_fsincos(c, src[0], true);
1725 result = ntq_fsign(c, src[0]);
1729 result = vir_FMOV(c, src[0]);
1735 result = vir_MAX(c, src[0], vir_NEG(c, src[0]));
1741 result = vir_FDX(c, src[0]);
1747 result = vir_FDY(c, src[0]);
1751 vir_set_pf(c, vir_ADD_dest(c, vir_nop_reg(), src[0], src[1]),
1757 vir_set_pf(c, vir_SUB_dest(c, vir_nop_reg(), src[0], src[1]),
1763 result = vir_VFPACK(c, src[0], src[1]);
1767 result = vir_FMOV(c, src[0]);
1772 result = vir_FMOV(c, src[0]);
1778 struct qreg tmp = vir_FMOV(c, src[0]);
1784 struct qreg abs_src = vir_FMOV(c, src[0]);
1792 vir_AND(c, src[0], vir_uniform_ui(c, 0x80000000));
2527 unsigned image_index = nir_src_as_uint(instr->src[0]);
2530 assert(nir_src_as_uint(instr->src[1]) == 0);
2557 int rt = nir_src_as_uint(instr->src[0]);
2730 if (nir_src_is_const(instr->src[0])) {
2732 nir_src_as_uint(instr->src[0]));
2757 uint32_t index = nir_src_as_uint(instr->src[0]);
2765 if (nir_src_is_const(instr->src[1])) {
2769 int offset = nir_src_as_uint(instr->src[1]);
2796 nir_intrinsic_base(instr) + nir_src_as_uint(instr->src[0]);
2849 unsigned rt = nir_src_as_uint(instr->src[1]);
2858 vir_MOV(c, ntq_get_src(c, instr->src[0], i));
2867 nir_src_as_uint(instr->src[1])) * 4 +
2871 vir_MOV(c, ntq_get_src(c, instr->src[0], i));
2880 struct qreg offset = ntq_get_src(c, instr->src[1], 0);
2896 struct qreg val = ntq_get_src(c, instr->src[0], 0);
2906 !nir_src_is_divergent(instr->src[1]);
2923 struct qreg val = ntq_get_src(c, instr->src[0], 0);
2925 if (nir_src_is_const(instr->src[1])) {
2927 base + nir_src_as_uint(instr->src[1]));
2930 ntq_get_src(c, instr->src[1], 1),
2934 !nir_src_is_divergent(instr->src[1]);
3119 nir_src offset = is_uniform ? instr->src[0] : instr->src[1];
3168 uint32_t index = is_uniform ? 0 : nir_src_as_uint(instr->src[0]);
3410 nir_src_comp_as_uint(instr->src[0], 0)));
3416 nir_src_comp_as_uint(instr->src[0], 0)));
3532 enum v3d_qpu_cond cond = ntq_emit_bool_to_cond(c, instr->src[0]);
3658 assert(nir_src_is_const(instr->src[1]));
3661 nir_src_as_uint(instr->src[1]);
3676 struct qreg col = ntq_get_src(c, instr->src[0], 0);
3723 vir_MOV(c, ntq_get_src(c, instr->src[0], 0)));
3725 vir_MOV(c, ntq_get_src(c, instr->src[0], 1)));
3741 struct qreg sample_idx = ntq_get_src(c, instr->src[0], 0);
3771 assert(nir_src_is_const(instr->src[1]));
3772 const uint32_t offset = nir_src_as_uint(instr->src[1]);
3797 struct qreg offset_x = ntq_get_src(c, instr->src[0], 0);
3798 struct qreg offset_y = ntq_get_src(c, instr->src[0], 1);
4558 if (inst->src[i].file == QFILE_REG &&
4559 inst->src[i].index == 0) {