Lines Matching defs:device
383 struct radv_device *device;
400 void radv_pipeline_cache_init(struct radv_pipeline_cache *cache, struct radv_device *device);
405 struct radv_device *device, struct radv_pipeline_cache *cache, const unsigned char *sha1,
410 struct radv_device *device, struct radv_pipeline_cache *cache, const unsigned char *sha1,
414 VkResult radv_upload_shaders(struct radv_device *device, struct radv_pipeline *pipeline,
765 struct radv_device *device;
944 bool radv_device_acquire_performance_counters(struct radv_device *device);
945 void radv_device_release_performance_counters(struct radv_device *device);
963 void radv_device_memory_init(struct radv_device_memory *mem, struct radv_device *device,
1059 void radv_buffer_init(struct radv_buffer *buffer, struct radv_device *device,
1372 void radv_initialise_color_surface(struct radv_device *device, struct radv_color_buffer_info *cb,
1374 void radv_initialise_ds_surface(struct radv_device *device, struct radv_ds_buffer_info *ds,
1582 struct radv_device *device;
1671 void si_emit_graphics(struct radv_device *device, struct radeon_cmdbuf *cs);
1672 void si_emit_compute(struct radv_device *device, struct radeon_cmdbuf *cs);
1674 void cik_create_gfx_config(struct radv_device *device);
1699 void si_cs_cp_dma_prefetch(const struct radv_device *device, struct radeon_cmdbuf *cs, uint64_t va,
1739 void radv_device_init_msaa(struct radv_device *device);
1740 VkResult radv_device_init_vrs_state(struct radv_device *device);
1751 bool radv_image_use_dcc_image_stores(const struct radv_device *device,
1753 bool radv_image_use_dcc_predication(const struct radv_device *device,
1774 bool radv_get_memory_fd(struct radv_device *device, struct radv_device_memory *memory, int *pFD);
1775 void radv_free_memory(struct radv_device *device, const VkAllocationCallbacks *pAllocator,
1787 radv_emit_shader_pointer_body(struct radv_device *device, struct radeon_cmdbuf *cs, uint64_t va,
1793 assert(va == 0 || (va >> 32) == device->physical_device->rad_info.address32_hi);
1800 radv_emit_shader_pointer(struct radv_device *device, struct radeon_cmdbuf *cs, uint32_t sh_offset,
1806 radv_emit_shader_pointer_body(device, cs, va, use_32bit_pointers);
1868 uint32_t radv_get_hash_flags(const struct radv_device *device, bool stats);
1889 unsigned radv_format_meta_fs_key(struct radv_device *device, VkFormat format);
1947 void radv_pipeline_slab_destroy(struct radv_device *device, struct radv_pipeline_slab *slab);
2109 struct radv_device *device;
2291 void radv_pipeline_init(struct radv_device *device, struct radv_pipeline *pipeline,
2294 VkResult radv_graphics_pipeline_create(VkDevice device, VkPipelineCache cache,
2306 void radv_pipeline_destroy(struct radv_device *device, struct radv_pipeline *pipeline,
2407 bool radv_layout_is_htile_compressed(const struct radv_device *device,
2411 bool radv_layout_can_fast_clear(const struct radv_device *device, const struct radv_image *image,
2415 bool radv_layout_dcc_compressed(const struct radv_device *device, const struct radv_image *image,
2419 bool radv_layout_fmask_compressed(const struct radv_device *device, const struct radv_image *image,
2491 radv_image_has_vrs_htile(const struct radv_device *device, const struct radv_image *image)
2494 return device->attachment_vrs_enabled && radv_image_has_htile(image) &&
2522 radv_image_tile_stencil_disabled(const struct radv_device *device, const struct radv_image *image)
2524 if (device->physical_device->rad_info.gfx_level >= GFX9) {
2525 return !vk_format_has_stencil(image->vk.format) && !radv_image_has_vrs_htile(device, image);
2591 radv_get_htile_initial_value(const struct radv_device *device, const struct radv_image *image)
2595 if (radv_image_tile_stencil_disabled(device, image)) {
2618 if (radv_image_has_vrs_htile(device, image)) {
2630 radv_image_get_iterate256(struct radv_device *device, struct radv_image *image)
2633 return device->physical_device->rad_info.gfx_level >= GFX10 &&
2658 bool radv_image_is_renderable(struct radv_device *device, struct radv_image *image);
2661 void radv_init_metadata(struct radv_device *device, struct radv_image *image,
2664 void radv_image_override_offset_stride(struct radv_device *device, struct radv_image *image,
2706 radv_image_create_layout(struct radv_device *device, struct radv_image_create_info create_info,
2717 bool vi_alpha_is_on_msb(struct radv_device *device, VkFormat format);
2724 VkResult radv_import_ahb_memory(struct radv_device *device, struct radv_device_memory *mem,
2727 VkResult radv_create_ahb_memory(struct radv_device *device, struct radv_device_memory *mem,
2741 void radv_image_view_init(struct radv_image_view *view, struct radv_device *device,
2771 void radv_buffer_view_init(struct radv_buffer_view *view, struct radv_device *device,
2866 VkResult radv_device_init_meta(struct radv_device *device);
2867 void radv_device_finish_meta(struct radv_device *device);
2907 int radv_queue_init(struct radv_device *device, struct radv_queue *queue, int idx,
2914 void radv_cmd_update_descriptor_sets(struct radv_device *device, struct radv_cmd_buffer *cmd_buffer,
2920 void radv_cmd_update_descriptor_set_with_template(struct radv_device *device,
2950 void radv_nir_shader_info_pass(struct radv_device *device, const struct nir_shader *nir,
2957 bool radv_thread_trace_init(struct radv_device *device);
2958 void radv_thread_trace_finish(struct radv_device *device);
2966 void radv_emit_inhibit_clockgating(struct radv_device *device, struct radeon_cmdbuf *cs,
2968 void radv_emit_spi_config_cntl(struct radv_device *device, struct radeon_cmdbuf *cs, bool enable);
3244 * placed here as it needs queue + device structs.
3249 return radv_queue_family_to_ring(queue->device->physical_device, queue->state.qf);
3257 radv_use_llvm_for_stage(struct radv_device *device, UNUSED gl_shader_stage stage)
3259 return device->physical_device->use_llvm;
3286 void radv_perfcounter_emit_spm_start(struct radv_device *device, struct radeon_cmdbuf *cs,
3288 void radv_perfcounter_emit_spm_stop(struct radv_device *device, struct radeon_cmdbuf *cs,
3292 bool radv_spm_init(struct radv_device *device);
3293 void radv_spm_finish(struct radv_device *device);
3294 void radv_emit_spm_setup(struct radv_device *device, struct radeon_cmdbuf *cs);