Lines Matching defs:device

80 create_expand_depth_stencil_compute(struct radv_device *device)
83    nir_shader *cs = build_expand_depth_stencil_compute_shader(device);
103       radv_device_to_handle(device), &ds_create_info, &device->meta_state.alloc,
104       &device->meta_state.expand_depth_stencil_compute_ds_layout);
111       .pSetLayouts = &device->meta_state.expand_depth_stencil_compute_ds_layout,
117       radv_device_to_handle(device), &pl_create_info, &device->meta_state.alloc,
118       &device->meta_state.expand_depth_stencil_compute_p_layout);
136       .layout = device->meta_state.expand_depth_stencil_compute_p_layout,
140       radv_device_to_handle(device), radv_pipeline_cache_to_handle(&device->meta_state.cache), 1,
142       &device->meta_state.expand_depth_stencil_compute_pipeline);
152 create_pipeline_layout(struct radv_device *device, VkPipelineLayout *layout)
162    return radv_CreatePipelineLayout(radv_device_to_handle(device), &pl_create_info,
163                                     &device->meta_state.alloc, layout);
167 create_pipeline(struct radv_device *device, uint32_t samples, VkPipelineLayout layout,
171    VkDevice device_h = radv_device_to_handle(device);
173    mtx_lock(&device->meta_state.mtx);
175       mtx_unlock(&device->meta_state.mtx);
179    nir_shader *vs_module = radv_meta_build_nir_vs_generate_vertices(device);
180    nir_shader *fs_module = radv_meta_build_nir_fs_noop(device);
294       device_h, radv_pipeline_cache_to_handle(&device->meta_state.cache), &pipeline_create_info,
295       &extra, &device->meta_state.alloc, pipeline);
300    mtx_unlock(&device->meta_state.mtx);
305 radv_device_finish_meta_depth_decomp_state(struct radv_device *device)
307    struct radv_meta_state *state = &device->meta_state;
310       radv_DestroyPipelineLayout(radv_device_to_handle(device), state->depth_decomp[i].p_layout,
313       radv_DestroyPipeline(radv_device_to_handle(device),
315       radv_DestroyPipeline(radv_device_to_handle(device),
319    radv_DestroyPipeline(radv_device_to_handle(device),
321    radv_DestroyPipelineLayout(radv_device_to_handle(device),
323    device->vk.dispatch_table.DestroyDescriptorSetLayout(
324       radv_device_to_handle(device), state->expand_depth_stencil_compute_ds_layout, &state->alloc);
328 radv_device_init_meta_depth_decomp_state(struct radv_device *device, bool on_demand)
330    struct radv_meta_state *state = &device->meta_state;
336       res = create_pipeline_layout(device, &state->depth_decomp[i].p_layout);
343       res = create_pipeline(device, samples, state->depth_decomp[i].p_layout, DEPTH_DECOMPRESS,
348       res = create_pipeline(device, samples, state->depth_decomp[i].p_layout, DEPTH_RESUMMARIZE,
354    return create_expand_depth_stencil_compute(device);
361    struct radv_meta_state *state = &cmd_buffer->device->meta_state;
369       ret = create_pipeline(cmd_buffer->device, samples, state->depth_decomp[samples_log2].p_layout,
376       ret = create_pipeline(cmd_buffer->device, samples, state->depth_decomp[samples_log2].p_layout,
402    struct radv_device *device = cmd_buffer->device;
409    radv_image_view_init(&iview, device,
534    struct radv_device *device = cmd_buffer->device;
545                         device->meta_state.expand_depth_stencil_compute_pipeline);
559             &load_iview, cmd_buffer->device,
573             &store_iview, cmd_buffer->device,
589             device->meta_state.expand_depth_stencil_compute_p_layout, 0, /* set */
631    uint32_t htile_value = radv_get_htile_initial_value(cmd_buffer->device, image);