Lines Matching refs:device
42 radv_choose_tiling(struct radv_device *device, const VkImageCreateInfo *pCreateInfo,
55 device->physical_device->rad_info.gfx_level <= GFX8) {
69 radv_use_tc_compat_htile_for_image(struct radv_device *device, const VkImageCreateInfo *pCreateInfo,
73 if (device->physical_device->rad_info.gfx_level < GFX8)
89 if (device->physical_device->rad_info.gfx_level < GFX9) {
110 radv_surface_has_scanout(struct radv_device *device, const struct radv_image_create_info *info)
113 if (device->physical_device->rad_info.gfx_level >= GFX9)
123 radv_image_use_fast_clear_for_image_early(const struct radv_device *device,
126 if (device->instance->debug_flags & RADV_DEBUG_FORCE_COMPRESS)
142 radv_image_use_fast_clear_for_image(const struct radv_device *device,
145 if (device->instance->debug_flags & RADV_DEBUG_FORCE_COMPRESS)
148 return radv_image_use_fast_clear_for_image_early(device, image) &&
154 radv_image_use_dcc_image_stores(device, image));
195 radv_format_is_atomic_allowed(struct radv_device *device, VkFormat format)
197 if (format == VK_FORMAT_R32_SFLOAT && !device->image_float32_atomics)
204 radv_formats_is_atomic_allowed(struct radv_device *device, const void *pNext, VkFormat format,
207 if (radv_format_is_atomic_allowed(device, format))
218 if (radv_format_is_atomic_allowed(device, format_list->pViewFormats[i]))
228 radv_use_dcc_for_image_early(struct radv_device *device, struct radv_image *image,
233 if (device->physical_device->rad_info.gfx_level < GFX8)
236 if (device->instance->debug_flags & RADV_DEBUG_NO_DCC)
250 (device->physical_device->rad_info.gfx_level < GFX10 ||
251 radv_formats_is_atomic_allowed(device, pCreateInfo->pNext, format, pCreateInfo->flags)))
264 if (!radv_image_use_fast_clear_for_image_early(device, image) &&
272 if (device->physical_device->rad_info.gfx_level < GFX10) {
274 if (pCreateInfo->samples > 1 && !device->physical_device->dcc_msaa_allowed)
279 device->physical_device->rad_info.gfx_level == GFX9)
283 return radv_are_formats_dcc_compatible(device->physical_device, pCreateInfo->pNext, format,
288 radv_use_dcc_for_image_late(struct radv_device *device, struct radv_image *image)
296 if (!radv_image_use_fast_clear_for_image(device, image))
302 !radv_image_use_dcc_image_stores(device, image))
319 radv_image_use_dcc_image_stores(const struct radv_device *device, const struct radv_image *image)
321 return ac_surface_supports_dcc_image_stores(device->physical_device->rad_info.gfx_level,
330 radv_image_use_dcc_predication(const struct radv_device *device, const struct radv_image *image)
332 return radv_image_has_dcc(image) && !radv_image_use_dcc_image_stores(device, image);
336 radv_use_fmask_for_image(const struct radv_device *device, const struct radv_image *image)
339 (device->instance->debug_flags & RADV_DEBUG_FORCE_COMPRESS));
343 radv_use_htile_for_image(const struct radv_device *device, const struct radv_image *image)
350 image->info.array_size == 1 && device->physical_device->rad_info.gfx_level >= GFX10;
353 if (device->physical_device->rad_info.gfx_level == GFX10 &&
358 if (device->physical_device->rad_info.chip_class == GFX10 &&
366 !(device->instance->debug_flags & RADV_DEBUG_FORCE_COMPRESS) &&
367 !device->attachment_vrs_enabled)
374 radv_use_tc_compat_cmask_for_image(struct radv_device *device, struct radv_image *image)
377 if (device->physical_device->rad_info.gfx_level < GFX8)
380 if (device->instance->debug_flags & RADV_DEBUG_NO_TC_COMPAT_CMASK)
385 device->physical_device->rad_info.gfx_level < GFX10)
403 si_get_bo_metadata_word1(const struct radv_device *device)
405 return (ATI_VENDOR_ID << 16) | device->physical_device->rad_info.pci_id;
409 radv_is_valid_opaque_metadata(const struct radv_device *device, const struct radeon_bo_metadata *md)
411 if (md->metadata[0] != 1 || md->metadata[1] != si_get_bo_metadata_word1(device))
421 radv_patch_surface_from_metadata(struct radv_device *device, struct radeon_surf *surface,
426 if (device->physical_device->rad_info.gfx_level >= GFX9) {
451 radv_patch_image_dimensions(struct radv_device *device, struct radv_image *image,
466 radv_is_valid_opaque_metadata(device, create_info->bo_metadata)) {
469 if (device->physical_device->rad_info.gfx_level >= GFX10) {
489 } else if (device->physical_device->rad_info.gfx_level >= GFX10) {
512 radv_patch_image_from_extra_info(struct radv_device *device, struct radv_image *image,
516 VkResult result = radv_patch_image_dimensions(device, image, create_info, image_info);
522 radv_patch_surface_from_metadata(device, &image->planes[plane].surface,
526 if (radv_surface_has_scanout(device, create_info)) {
528 if (device->instance->debug_flags & RADV_DEBUG_NO_DISPLAY_DCC)
534 if (create_info->prime_blit_src && device->physical_device->rad_info.gfx_level == GFX9) {
581 radv_get_surface_flags(struct radv_device *device, struct radv_image *image, unsigned plane_id,
585 unsigned array_mode = radv_choose_tiling(device, pCreateInfo, image_format);
586 VkFormat format = radv_image_get_plane_format(device->physical_device, image, plane_id);
621 if (radv_use_htile_for_image(device, image) &&
622 !(device->instance->debug_flags & RADV_DEBUG_NO_HIZ)) {
623 if (radv_use_tc_compat_htile_for_image(device, pCreateInfo, image_format))
633 if (device->physical_device->rad_info.gfx_level >= GFX9 &&
638 if (!radv_use_dcc_for_image_early(device, image, pCreateInfo, image_format,
642 if (!radv_use_fmask_for_image(device, image))
712 radv_make_buffer_descriptor(struct radv_device *device, struct radv_buffer *buffer,
732 if (device->physical_device->rad_info.gfx_level != GFX8 && stride) {
742 if (device->physical_device->rad_info.gfx_level >= GFX10) {
743 const struct gfx10_format *fmt = &ac_get_gfx10_format_table(&device->physical_device->rad_info)[vk_format_to_pipe_format(vk_format)];
754 S_008F0C_RESOURCE_LEVEL(device->physical_device->rad_info.gfx_level < GFX11);
767 si_set_mutable_tex_desc_fields(struct radv_device *device, struct radv_image *image,
777 enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level;
941 vi_alpha_is_on_msb(struct radv_device *device, VkFormat format)
945 if (device->physical_device->rad_info.gfx_level >= GFX10 && desc->nr_channels == 1)
954 gfx10_make_texture_descriptor(struct radv_device *device, struct radv_image *image,
980 img_format = ac_get_gfx10_format_table(&device->physical_device->rad_info)[vk_format_to_pipe_format(vk_format)].img_format;
989 is_storage_image, device->physical_device->rad_info.gfx_level == GFX9);
1006 S_00A008_RESOURCE_LEVEL(device->physical_device->rad_info.gfx_level < GFX11);
1040 if (device->physical_device->rad_info.gfx_level >= GFX11) {
1050 S_00A018_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device, vk_format));
1053 if (radv_image_get_iterate256(device, image)) {
1114 si_make_texture_descriptor(struct radv_device *device, struct radv_image *image,
1155 if (device->physical_device->rad_info.gfx_level == GFX9 && vk_format == VK_FORMAT_S8_UINT &&
1163 if (device->physical_device->rad_info.gfx_level == GFX9 &&
1169 is_storage_image, device->physical_device->rad_info.gfx_level == GFX9);
1199 if (device->physical_device->rad_info.gfx_level == GFX9) {
1220 state[6] = S_008F28_ALPHA_IS_ON_MSB(vi_alpha_is_on_msb(device, vk_format));
1222 if (device->instance->disable_aniso_single_level) {
1226 if (device->physical_device->rad_info.gfx_level <= GFX7 && image->info.samples <= 1) {
1246 if (device->physical_device->rad_info.gfx_level == GFX9) {
1294 if (device->physical_device->rad_info.gfx_level == GFX9) {
1328 radv_make_texture_descriptor(struct radv_device *device, struct radv_image *image,
1335 if (device->physical_device->rad_info.gfx_level >= GFX10) {
1336 gfx10_make_texture_descriptor(device, image, is_storage_image, view_type, vk_format, mapping,
1340 si_make_texture_descriptor(device, image, is_storage_image, view_type, vk_format, mapping,
1347 radv_query_opaque_metadata(struct radv_device *device, struct radv_image *image,
1355 radv_make_texture_descriptor(device, image, false, (VkImageViewType)image->vk.image_type,
1360 si_set_mutable_tex_desc_fields(device, image, &image->planes[0].surface.u.legacy.level[0], 0, 0,
1364 ac_surface_get_umd_metadata(&device->physical_device->rad_info, &image->planes[0].surface,
1369 radv_init_metadata(struct radv_device *device, struct radv_image *image,
1376 if (device->physical_device->rad_info.gfx_level >= GFX9) {
1404 radv_query_opaque_metadata(device, image, metadata);
1408 radv_image_override_offset_stride(struct radv_device *device, struct radv_image *image,
1411 ac_surface_override_offset_stride(&device->physical_device->rad_info, &image->planes[0].surface,
1416 radv_image_alloc_single_sample_cmask(const struct radv_device *device,
1421 !radv_image_use_fast_clear_for_image(device, image) ||
1433 radv_image_alloc_values(const struct radv_device *device, struct radv_image *image)
1444 if (radv_image_use_dcc_predication(device, image)) {
1456 device->physical_device->rad_info.has_tc_compat_zrange_bug) {
1470 radv_image_is_pipe_misaligned(const struct radv_device *device, const struct radv_image *image)
1472 struct radeon_info *rad_info = &device->physical_device->rad_info;
1478 VkFormat fmt = radv_image_get_plane_format(device->physical_device, image, i);
1518 radv_image_is_l2_coherent(const struct radv_device *device, const struct radv_image *image)
1520 if (device->physical_device->rad_info.gfx_level >= GFX10) {
1521 return !device->physical_device->rad_info.tcc_rb_non_coherent &&
1522 !radv_image_is_pipe_misaligned(device, image);
1523 } else if (device->physical_device->rad_info.gfx_level == GFX9) {
1543 radv_image_can_fast_clear(const struct radv_device *device, const struct radv_image *image)
1545 if (device->instance->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)
1553 if (!radv_image_has_dcc(image) && device->physical_device->rad_info.family == CHIP_STONEY)
1571 radv_image_use_comp_to_single(const struct radv_device *device, const struct radv_image *image)
1574 if (device->physical_device->rad_info.gfx_level < GFX10)
1578 if (!radv_image_can_fast_clear(device, image))
1587 if (bytes_per_pixel <= 2 && !device->physical_device->rad_info.rbplus_allowed)
1635 radv_image_create_layout(struct radv_device *device, struct radv_image_create_info create_info,
1644 VkResult result = radv_patch_image_from_extra_info(device, image, &create_info, &image_info);
1650 radv_image_reset_layout(device->physical_device, image);
1652 unsigned plane_count = radv_get_internal_plane_count(device->physical_device, image->vk.format);
1666 device->ws->surface_init(device->ws, &info, &image->planes[plane].surface);
1669 if (!radv_use_dcc_for_image_late(device, image))
1674 !ac_surface_set_umd_metadata(&device->physical_device->rad_info,
1682 radv_image_alloc_single_sample_cmask(device, image, &image->planes[plane].surface);
1697 if (!ac_surface_override_offset_stride(&device->physical_device->rad_info,
1709 if (ac_surface_get_plane_offset(device->physical_device->rad_info.gfx_level,
1720 radv_image_get_plane_format(device->physical_device, image, plane);
1724 radv_image_has_cmask(image) && radv_use_tc_compat_cmask_for_image(device, image);
1726 image->l2_coherent = radv_image_is_l2_coherent(device, image);
1728 image->support_comp_to_single = radv_image_use_comp_to_single(device, image);
1730 radv_image_alloc_values(device, image);
1739 radv_destroy_image(struct radv_device *device, const VkAllocationCallbacks *pAllocator,
1743 device->ws->buffer_destroy(device->ws, image->bindings[0].bo);
1747 radv_free_memory(device, pAllocator, mem);
1751 vk_free2(&device->vk.alloc, pAllocator, image);
1755 radv_image_print_info(struct radv_device *device, struct radv_image *image)
1768 uint64_t offset = ac_surface_get_plane_offset(device->physical_device->rad_info.gfx_level,
1773 ac_surface_print_info(stderr, &device->physical_device->rad_info, surf);
1820 RADV_FROM_HANDLE(radv_device, device, _device);
1831 unsigned plane_count = radv_get_internal_plane_count(device->physical_device, format);
1843 vk_zalloc2(&device->vk.alloc, alloc, image_struct_size, 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1845 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
1847 vk_image_init(&device->vk, &image->vk, pCreateInfo);
1868 image->queue_family_mask |= 1u << vk_queue_to_radv(device->physical_device,
1879 image->info.surf_index = &device->image_mrt_offset_counter;
1883 modifier = radv_select_modifier(device, format, mod_list);
1889 radv_get_surface_flags(device, image, plane, pCreateInfo, format);
1903 VkResult result = radv_image_create_layout(device, *create_info, explicit_mod, image);
1905 radv_destroy_image(device, alloc, image);
1915 device->ws->buffer_create(device->ws, image->size, image->alignment, 0,
1919 radv_destroy_image(device, alloc, image);
1920 return vk_error(device, result);
1924 if (device->instance->debug_flags & RADV_DEBUG_IMG) {
1925 radv_image_print_info(device, image);
1934 radv_image_view_make_descriptor(struct radv_image_view *iview, struct radv_device *device,
1959 if (device->physical_device->rad_info.gfx_level >= GFX9)
1962 device, image, is_storage_image, iview->vk.view_type, vk_format, components, hw_level,
1972 if (device->physical_device->rad_info.gfx_level <= GFX9) {
1979 bool enable_write_compression = radv_image_use_dcc_image_stores(device, image);
1982 si_set_mutable_tex_desc_fields(device, image, base_level_info, plane_id, iview->vk.base_mip_level,
2030 radv_image_view_can_fast_clear(const struct radv_device *device,
2040 if (!radv_image_can_fast_clear(device, image))
2055 radv_image_view_init(struct radv_image_view *iview, struct radv_device *device,
2072 vk_image_view_init(&device->vk, &iview->vk, !from_client, pCreateInfo);
2113 if (device->physical_device->emulate_etc2 &&
2125 if (device->physical_device->rad_info.gfx_level >= GFX9) {
2170 if (device->physical_device->rad_info.gfx_level >= GFX9 &&
2196 iview->support_fast_clear = radv_image_view_can_fast_clear(device, iview);
2203 radv_image_view_make_descriptor(iview, device, format, &pCreateInfo->components, min_lod, false,
2206 radv_image_view_make_descriptor(iview, device, format, &pCreateInfo->components, min_lod, true,
2219 radv_layout_is_htile_compressed(const struct radv_device *device, const struct radv_image *image,
2244 !in_render_loop && !device->instance->disable_tc_compat_htile_in_general) {
2273 radv_layout_can_fast_clear(const struct radv_device *device, const struct radv_image *image,
2278 !radv_layout_dcc_compressed(device, image, level, layout, in_render_loop, queue_mask))
2292 return queue_mask == (1u << RADV_QUEUE_GENERAL) || radv_image_use_comp_to_single(device, image);
2296 radv_layout_dcc_compressed(const struct radv_device *device, const struct radv_image *image,
2313 (queue_mask & (1u << RADV_QUEUE_COMPUTE)) && !radv_image_use_dcc_image_stores(device, image))
2323 return device->physical_device->rad_info.gfx_level >= GFX10 || layout != VK_IMAGE_LAYOUT_GENERAL;
2327 radv_layout_fmask_compressed(const struct radv_device *device, const struct radv_image *image,
2360 radv_CreateImage(VkDevice device, const VkImageCreateInfo *pCreateInfo,
2368 return radv_image_from_gralloc(device, pCreateInfo, gralloc_info, pAllocator, pImage);
2376 return radv_image_create(device,
2388 RADV_FROM_HANDLE(radv_device, device, _device);
2394 radv_destroy_image(device, pAllocator, image);
2402 RADV_FROM_HANDLE(radv_device, device, _device);
2419 pLayout->offset = ac_surface_get_plane_offset(device->physical_device->rad_info.gfx_level,
2421 pLayout->rowPitch = ac_surface_get_plane_stride(device->physical_device->rad_info.gfx_level,
2426 } else if (device->physical_device->rad_info.gfx_level >= GFX9) {
2429 pLayout->offset = ac_surface_get_plane_offset(device->physical_device->rad_info.gfx_level,
2480 RADV_FROM_HANDLE(radv_device, device, _device);
2484 vk_alloc2(&device->vk.alloc, pAllocator, sizeof(*view), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
2486 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
2488 radv_image_view_init(view, device, pCreateInfo, image->vk.create_flags,
2499 RADV_FROM_HANDLE(radv_device, device, _device);
2506 vk_free2(&device->vk.alloc, pAllocator, iview);
2510 radv_buffer_view_init(struct radv_buffer_view *view, struct radv_device *device,
2515 vk_object_base_init(&device->vk, &view->base, VK_OBJECT_TYPE_BUFFER_VIEW);
2521 radv_make_buffer_descriptor(device, buffer, view->vk_format, pCreateInfo->offset, view->range,
2535 RADV_FROM_HANDLE(radv_device, device, _device);
2539 vk_alloc2(&device->vk.alloc, pAllocator, sizeof(*view), 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
2541 return vk_error(device, VK_ERROR_OUT_OF_HOST_MEMORY);
2543 radv_buffer_view_init(view, device, pCreateInfo);
2554 RADV_FROM_HANDLE(radv_device, device, _device);
2561 vk_free2(&device->vk.alloc, pAllocator, view);