Lines Matching defs:plane
520 for (unsigned plane = 0; plane < image->plane_count; ++plane) {
522 radv_patch_surface_from_metadata(device, &image->planes[plane].surface,
527 image->planes[plane].surface.flags |= RADEON_SURF_SCANOUT;
529 image->planes[plane].surface.flags |= RADEON_SURF_DISABLE_DCC;
536 image->planes[plane].surface.flags |= RADEON_SURF_DISABLE_DCC;
569 unsigned plane)
573 if (plane == 0)
577 return vk_format_get_plane_format(image->vk.format, plane);
654 si_tile_mode_index(const struct radv_image_plane *plane, unsigned level, bool stencil)
657 return plane->surface.u.legacy.zs.stencil_tiling_index[level];
659 return plane->surface.u.legacy.tiling_index[level];
773 struct radv_image_plane *plane = &image->planes[plane_id];
781 va += plane->surface.u.gfx9.zs.stencil_offset;
783 va += plane->surface.u.gfx9.surf_offset;
789 state[0] |= plane->surface.tile_swizzle;
797 meta_va = gpu_address + plane->surface.meta_offset;
799 meta_va += plane->surface.u.legacy.color.dcc_level[base_level].dcc_offset;
801 unsigned dcc_tile_swizzle = plane->surface.tile_swizzle << 8;
802 dcc_tile_swizzle &= (1 << plane->surface.meta_alignment_log2) - 1;
805 meta_va = gpu_address + plane->surface.meta_offset;
819 state[3] |= S_00A00C_SW_MODE(plane->surface.u.gfx9.zs.stencil_swizzle_mode);
821 state[3] |= S_00A00C_SW_MODE(plane->surface.u.gfx9.swizzle_mode);
832 if (!(plane->surface.flags & RADEON_SURF_Z_OR_SBUFFER))
833 meta = plane->surface.u.gfx9.color.dcc;
848 state[3] |= S_008F1C_SW_MODE(plane->surface.u.gfx9.zs.stencil_swizzle_mode);
849 state[4] |= S_008F20_PITCH(plane->surface.u.gfx9.zs.stencil_epitch);
851 state[3] |= S_008F1C_SW_MODE(plane->surface.u.gfx9.swizzle_mode);
852 state[4] |= S_008F20_PITCH(plane->surface.u.gfx9.epitch);
863 if (!(plane->surface.flags & RADEON_SURF_Z_OR_SBUFFER))
864 meta = plane->surface.u.gfx9.color.dcc;
873 unsigned index = si_tile_mode_index(plane, base_level, is_stencil);
1653 for (unsigned plane = 0; plane < plane_count; ++plane) {
1658 info.width = vk_format_get_plane_width(image->vk.format, plane, info.width);
1659 info.height = vk_format_get_plane_height(image->vk.format, plane, info.height);
1662 image->planes[plane].surface.flags |=
1666 device->ws->surface_init(device->ws, &info, &image->planes[plane].surface);
1668 if (plane == 0) {
1675 &image->planes[plane].surface, image_info.storage_samples,
1682 radv_image_alloc_single_sample_cmask(device, image, &image->planes[plane].surface);
1685 if (mod_info->pPlaneLayouts[plane].rowPitch % image->planes[plane].surface.bpe ||
1686 !mod_info->pPlaneLayouts[plane].rowPitch)
1689 offset = mod_info->pPlaneLayouts[plane].offset;
1690 stride = mod_info->pPlaneLayouts[plane].rowPitch / image->planes[plane].surface.bpe;
1693 align64(image->size, 1 << image->planes[plane].surface.alignment_log2);
1698 &image->planes[plane].surface, image->info.levels,
1704 unsigned mem_planes = ac_surface_get_nplanes(&image->planes[plane].surface);
1710 &image->planes[plane].surface, i,
1716 image->size = MAX2(image->size, offset + image->planes[plane].surface.total_size);
1717 image->alignment = MAX2(image->alignment, 1 << image->planes[plane].surface.alignment_log2);
1719 image->planes[plane].format =
1720 radv_image_get_plane_format(device->physical_device, image, plane);
1765 const struct radv_image_plane *plane = &image->planes[i];
1766 const struct radeon_surf *surf = &plane->surface;
1767 const struct util_format_description *desc = vk_format_description(plane->format);
1769 &plane->surface, 0, 0);
1887 for (unsigned plane = 0; plane < plane_count; ++plane) {
1888 image->planes[plane].surface.flags =
1889 radv_get_surface_flags(device, image, plane, pCreateInfo, format);
1890 image->planes[plane].surface.modifier = modifier;
1942 struct radv_image_plane *plane = &image->planes[plane_id];
1955 assert(plane->surface.blk_w % vk_format_get_blockwidth(plane->format) == 0);
1956 blk_w = plane->surface.blk_w / vk_format_get_blockwidth(plane->format) *
1974 base_level_info = &plane->surface.u.legacy.zs.stencil_level[iview->vk.base_mip_level];
1976 base_level_info = &plane->surface.u.legacy.level[iview->vk.base_mip_level];
2410 struct radv_image_plane *plane = &image->planes[plane_id];
2411 struct radeon_surf *surface = &plane->surface;
2430 &plane->surface, 0, layer) +