Lines Matching defs:surf
6247 const struct radeon_surf *surf = &plane->surface;
6267 cb->cb_color_attrib3 |= S_028EE0_COLOR_SW_MODE(surf->u.gfx9.swizzle_mode) |
6268 S_028EE0_DCC_PIPE_ALIGNED(surf->u.gfx9.color.dcc.pipe_aligned);
6270 cb->cb_color_attrib3 |= S_028EE0_COLOR_SW_MODE(surf->u.gfx9.swizzle_mode) |
6271 S_028EE0_FMASK_SW_MODE(surf->u.gfx9.color.fmask_swizzle_mode) |
6273 S_028EE0_DCC_PIPE_ALIGNED(surf->u.gfx9.color.dcc.pipe_aligned);
6280 if (surf->meta_offset)
6281 meta = surf->u.gfx9.color.dcc;
6283 cb->cb_color_attrib |= S_028C74_COLOR_SW_MODE(surf->u.gfx9.swizzle_mode) |
6284 S_028C74_FMASK_SW_MODE(surf->u.gfx9.color.fmask_swizzle_mode) |
6287 cb->cb_mrt_epitch = S_0287A0_EPITCH(surf->u.gfx9.epitch);
6290 cb->cb_color_base += surf->u.gfx9.surf_offset >> 8;
6291 cb->cb_color_base |= surf->tile_swizzle;
6293 const struct legacy_surf_level *level_info = &surf->u.legacy.level[iview->vk.base_mip_level];
6298 cb->cb_color_base |= surf->tile_swizzle;
6306 cb->cb_color_cmask_slice = surf->u.legacy.color.cmask_slice_tile_max;
6313 S_028C64_FMASK_TILE_MAX(surf->u.legacy.color.fmask.pitch_in_pixels / 8 - 1);
6314 cb->cb_color_attrib |= S_028C74_FMASK_TILE_MODE_INDEX(surf->u.legacy.color.fmask.tiling_index);
6315 cb->cb_color_fmask_slice = S_028C88_TILE_MAX(surf->u.legacy.color.fmask.slice_tile_max);
6327 va += surf->cmask_offset;
6331 va += surf->meta_offset;
6337 unsigned dcc_tile_swizzle = surf->tile_swizzle;
6338 dcc_tile_swizzle &= ((1 << surf->meta_alignment_log2) - 1) >> 8;
6360 surf->fmask_offset;
6362 cb->cb_color_fmask |= surf->fmask_tile_swizzle;
6411 unsigned fmask_bankh = util_logbase2(surf->u.legacy.color.fmask.bankh);
6444 unsigned bankh = util_logbase2(surf->u.legacy.bankh);
6461 S_028EE0_MIP0_DEPTH(mip0_depth) | S_028EE0_RESOURCE_TYPE(surf->u.gfx9.resource_type) |
6466 S_028C74_MIP0_DEPTH(mip0_depth) | S_028C74_RESOURCE_TYPE(surf->u.gfx9.resource_type);
6523 const struct radeon_surf *surf = &image->planes[0].surface;
6531 S_028038_SW_MODE(surf->u.gfx9.swizzle_mode) |
6553 const struct radeon_surf *surf = &plane->surface;
6579 stencil_format = surf->has_stencil ? V_028044_STENCIL_8 : V_028044_STENCIL_INVALID;
6596 assert(surf->u.gfx9.surf_offset == 0);
6597 s_offs += surf->u.gfx9.zs.stencil_offset;
6601 S_028038_SW_MODE(surf->u.gfx9.swizzle_mode) |
6606 S_02803C_SW_MODE(surf->u.gfx9.zs.stencil_swizzle_mode) |
6610 ds->db_z_info2 = S_028068_EPITCH(surf->u.gfx9.epitch);
6611 ds->db_stencil_info2 = S_02806C_EPITCH(surf->u.gfx9.zs.stencil_epitch);
6644 surf->meta_offset;
6657 const struct legacy_surf_level *level_info = &surf->u.legacy.level[level];
6660 level_info = &surf->u.legacy.zs.stencil_level[level];
6662 z_offs += (uint64_t)surf->u.legacy.level[level].offset_256B * 256;
6663 s_offs += (uint64_t)surf->u.legacy.zs.stencil_level[level].offset_256B * 256;
6674 unsigned tiling_index = surf->u.legacy.tiling_index[level];
6675 unsigned stencil_index = surf->u.legacy.zs.stencil_tiling_index[level];
6676 unsigned macro_index = surf->u.legacy.macro_tile_index;
6714 surf->meta_offset;