Lines Matching defs:desc
3859 uint32_t *desc = &map[4];
3866 desc[0] = esgs_va;
3867 desc[1] = S_008F04_BASE_ADDRESS_HI(esgs_va >> 32);
3868 desc[2] = esgs_ring_size;
3869 desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
3874 desc[1] |= S_008F04_SWIZZLE_ENABLE_GFX11(1);
3876 desc[1] |= S_008F04_SWIZZLE_ENABLE_GFX6(1);
3879 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_FLOAT) |
3882 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
3886 desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
3889 desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
3896 desc[4] = esgs_va;
3897 desc[5] = S_008F04_BASE_ADDRESS_HI(esgs_va >> 32);
3898 desc[6] = esgs_ring_size;
3899 desc[7] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
3903 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_FLOAT) |
3906 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
3909 desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
3914 desc += 8;
3922 desc[0] = gsvs_va;
3923 desc[1] = S_008F04_BASE_ADDRESS_HI(gsvs_va >> 32);
3924 desc[2] = gsvs_ring_size;
3925 desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
3929 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_FLOAT) |
3932 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
3935 desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
3941 /* shader will patch stride and desc[2] */
3942 desc[4] = gsvs_va;
3943 desc[5] = S_008F04_BASE_ADDRESS_HI(gsvs_va >> 32);
3944 desc[6] = 0;
3945 desc[7] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
3950 desc[5] |= S_008F04_SWIZZLE_ENABLE_GFX11(1);
3952 desc[5] |= S_008F04_SWIZZLE_ENABLE_GFX6(1);
3955 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_FLOAT) |
3958 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
3962 desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
3965 desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
3970 desc += 8;
3976 desc[0] = tess_va;
3977 desc[1] = S_008F04_BASE_ADDRESS_HI(tess_va >> 32);
3978 desc[2] = device->physical_device->hs.tess_factor_ring_size;
3979 desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
3983 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_FLOAT) |
3986 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
3989 desc[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
3993 desc[4] = tess_offchip_va;
3994 desc[5] = S_008F04_BASE_ADDRESS_HI(tess_offchip_va >> 32);
3995 desc[6] = device->physical_device->hs.tess_offchip_ring_size;
3996 desc[7] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
4000 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_FLOAT) |
4003 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
4006 desc[7] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
4011 desc += 8;
4018 desc[0] = task_draw_ring_va;
4019 desc[1] = S_008F04_BASE_ADDRESS_HI(task_draw_ring_va >> 32);
4020 desc[2] = device->physical_device->task_info.num_entries * AC_TASK_DRAW_ENTRY_BYTES;
4021 desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
4025 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_UINT) |
4029 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_UINT) |
4033 desc[4] = task_payload_ring_va;
4034 desc[5] = S_008F04_BASE_ADDRESS_HI(task_payload_ring_va >> 32);
4035 desc[6] = device->physical_device->task_info.num_entries * AC_TASK_PAYLOAD_ENTRY_BYTES;
4036 desc[7] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
4040 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_UINT) |
4044 desc[7] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_UINT) |
4049 desc += 8;
4054 desc[0] = va;
4055 desc[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
4056 desc[2] = RADV_MESH_SCRATCH_NUM_ENTRIES * RADV_MESH_SCRATCH_ENTRY_BYTES;
4057 desc[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
4061 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_UINT) |
4065 desc[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_UINT) |
4070 desc += 4;
4074 memcpy(desc, device->sample_locations_1x, 8);
4075 desc += 2;
4076 memcpy(desc, device->sample_locations_2x, 16);
4077 desc += 4;
4078 memcpy(desc, device->sample_locations_4x, 32);
4079 desc += 8;
4080 memcpy(desc, device->sample_locations_8x, 64);
6242 const struct util_format_description *desc;
6249 desc = vk_format_description(iview->vk.format);
6255 cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1_GFX11(desc->swizzle[3] == PIPE_SWIZZLE_1);
6257 cb->cb_color_attrib = S_028C74_FORCE_DST_ALPHA_1_GFX6(desc->swizzle[3] == PIPE_SWIZZLE_1);
6367 ntype = radv_translate_color_numformat(iview->vk.format, desc,