Lines Matching defs:buffer
1886 (32 /* uniform buffer, 32 due to potential space wasted on alignment */ +
1887 32 /* storage buffer, 32 due to potential space wasted on alignment */ +
1931 .sparseAddressSpaceSize = RADV_MAX_MEMORY_ALLOCATION_SIZE, /* buffer max size */
2168 (32 /* uniform buffer, 32 due to potential space wasted on alignment */ +
2169 32 /* storage buffer, 32 due to potential space wasted on alignment */ +
3057 VkBuffer buffer;
3090 &device->meta_state.alloc, &buffer);
3096 .buffer = buffer,
3115 .buffer = buffer,
3125 device->vrs.buffer = radv_buffer_from_handle(buffer);
3133 radv_DestroyBuffer(radv_device_to_handle(device), buffer, &device->meta_state.alloc);
3148 radv_DestroyBuffer(radv_device_to_handle(device), radv_buffer_to_handle(device->vrs.buffer),
3461 /* With update after bind we can't attach bo's to the command buffer
3536 * We can decrease the constant to decrease the scratch buffer size.
3602 fprintf(stderr, "radv: Thread trace support is enabled (initial buffer size: %u MiB, "
3665 /* If the border color extension is enabled, let's create the buffer we need. */
4190 /* Tell the GPU where the task control buffer is. */
4192 /* bits [31:8]: control buffer address lo, bits[7:0]: reserved (set to zero) */
4194 /* bits [31:0]: control buffer address hi */
4420 /* We write the control buffer from the CPU, so need to grant CPU access to the BO.
4774 RADV_FROM_HANDLE(radv_buffer, buffer, bind->buffer);
4783 result = device->ws->buffer_virtual_bind(device->ws, buffer->bo,
5474 /* In case of prime, linear buffer is allocated in default heap which is VRAM.
5487 mem->buffer = radv_buffer_from_handle(dedicate_info->buffer);
5490 mem->buffer = NULL;
5493 if (wsi_info && wsi_info->implicit_sync && mem->buffer) {
5494 /* Mark the linear prime buffer (aka the destination of the prime blit
5710 /* Allow 32-bit address-space for DGC usage, as this buffer will contain
5711 * cmd buffer upload buffers, and those get passed to shaders through 32-bit
5759 RADV_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
5761 radv_get_buffer_memory_requirements(device, buffer->vk.size, buffer->vk.create_flags,
5762 buffer->vk.usage, pMemoryRequirements);
5846 RADV_FROM_HANDLE(radv_buffer, buffer, pBindInfos[i].buffer);
5851 .buffer = pBindInfos[i].buffer,
5861 "Device memory object too small for the buffer.\n");
5865 buffer->bo = mem->bo;
5866 buffer->offset = pBindInfos[i].memoryOffset;
6029 radv_buffer_init(struct radv_buffer *buffer, struct radv_device *device,
6038 vk_buffer_init(&device->vk, &buffer->vk, &createInfo);
6040 buffer->bo = bo;
6041 buffer->offset = offset;
6045 radv_buffer_finish(struct radv_buffer *buffer)
6047 vk_buffer_finish(&buffer->vk);
6052 struct radv_buffer *buffer)
6054 if ((buffer->vk.create_flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) && buffer->bo)
6055 device->ws->buffer_destroy(device->ws, buffer->bo);
6057 radv_buffer_finish(buffer);
6058 vk_free2(&device->vk.alloc, pAllocator, buffer);
6066 struct radv_buffer *buffer;
6070 buffer = vk_alloc2(&device->vk.alloc, pAllocator, sizeof(*buffer), 8,
6072 if (buffer == NULL)
6075 vk_buffer_init(&device->vk, &buffer->vk, pCreateInfo);
6076 buffer->bo = NULL;
6077 buffer->offset = 0;
6091 device->ws->buffer_create(device->ws, align64(buffer->vk.size, 4096), 4096, 0, flags,
6092 RADV_BO_PRIORITY_VIRTUAL, replay_address, &buffer->bo);
6094 radv_destroy_buffer(device, pAllocator, buffer);
6099 *pBuffer = radv_buffer_to_handle(buffer);
6108 RADV_FROM_HANDLE(radv_buffer, buffer, _buffer);
6110 if (!buffer)
6113 radv_destroy_buffer(device, pAllocator, buffer);
6119 RADV_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
6120 return radv_buffer_get_va(buffer->bo) + buffer->offset;
6126 RADV_FROM_HANDLE(radv_buffer, buffer, pInfo->buffer);
6127 return buffer->bo ? radv_buffer_get_va(buffer->bo) + buffer->offset : 0;