Lines Matching refs:dst
4350 * on the dst flush side we skip CB/DB flushes without the STORAGE bit, so
5256 uint32_t *dst = descriptors_state->dynamic_buffers + idx * 4;
5262 memset(dst, 0, 4 * 4);
5265 dst[0] = va;
5266 dst[1] = S_008F04_BASE_ADDRESS_HI(va >> 32);
5267 dst[2] = no_dynamic_bounds ? 0xffffffffu : range->size;
5268 dst[3] = S_008F0C_DST_SEL_X(V_008F0C_SQ_SEL_X) | S_008F0C_DST_SEL_Y(V_008F0C_SQ_SEL_Y) |
5272 dst[3] |= S_008F0C_FORMAT(V_008F0C_GFX11_FORMAT_32_FLOAT) |
5275 dst[3] |= S_008F0C_FORMAT(V_008F0C_GFX10_FORMAT_32_FLOAT) |
5278 dst[3] |= S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
10235 radeon_emit(cs, va); /* dst address lo */
10236 radeon_emit(cs, va >> 32); /* dst address hi */