Lines Matching defs:view
4568 struct radv_image_view *view = state->attachments[att_idx].iview;
4570 if (view->image->info.samples == 1)
4607 struct radv_image_view *view = cmd_buffer->state.attachments[idx].iview;
4610 range.aspectMask = view->vk.aspects;
4611 range.baseMipLevel = view->vk.base_mip_level;
4613 range.baseArrayLayer = view->vk.base_array_layer;
4621 * account for the "real" number of layers. If the view mask is
4647 radv_handle_image_transition(cmd_buffer, view->image,
4655 cmd_buffer, view->image, cmd_buffer->state.attachments[idx].current_stencil_layout,
4659 radv_handle_image_transition(cmd_buffer, view->image,
7017 u_foreach_bit(view, state->subpass->view_mask) {
7018 radv_emit_view_index(cmd_buffer, view);
7046 u_foreach_bit(view, state->subpass->view_mask) {
7047 radv_emit_view_index(cmd_buffer, view);
7085 u_foreach_bit(view, state->subpass->view_mask) {
7086 radv_emit_view_index(cmd_buffer, view);
7110 u_foreach_bit(view, state->subpass->view_mask) {
7111 radv_emit_view_index(cmd_buffer, view);
7143 u_foreach_bit(view, view_mask) {
7144 radv_emit_view_index(cmd_buffer, view);
7171 u_foreach_bit(view, view_mask) {
7172 radv_emit_view_index(cmd_buffer, view);
7205 u_foreach_bit (view, view_mask) {
7206 radv_emit_view_index(cmd_buffer, view);
7296 u_foreach_bit (view, view_mask) {
7297 radv_emit_view_index(cmd_buffer, view);
8347 u_foreach_bit (view, view_mask) {
8348 radv_emit_view_index(cmd_buffer, view);