Lines Matching defs:data
377 unsigned count, const uint32_t *data)
387 radeon_emit_array(cs, data, count);
663 radv_cmd_buffer_upload_data(struct radv_cmd_buffer *cmd_buffer, unsigned size, const void *data,
672 memcpy(ptr, data, size);
886 uint32_t data[2];
905 data[0] = pipeline_address;
906 data[1] = pipeline_address >> 32;
908 radv_emit_write_data_packet(cmd_buffer, V_370_ME, va, 2, data);
915 uint32_t data[2];
921 data[0] = vb_ptr;
922 data[1] = vb_ptr >> 32;
924 radv_emit_write_data_packet(cmd_buffer, V_370_ME, va, 2, data);
931 uint32_t data[2];
938 data[0] = prolog_address;
939 data[1] = prolog_address >> 32;
941 radv_emit_write_data_packet(cmd_buffer, V_370_ME, va, 2, data);
963 uint32_t data[MAX_SETS * 2] = {0};
970 data[i * 2] = (uint64_t)(uintptr_t)set;
971 data[i * 2 + 1] = (uint64_t)(uintptr_t)set >> 32;
974 radv_emit_write_data_packet(cmd_buffer, V_370_ME, va, MAX_SETS * 2, data);
2657 * broken if the CB caches data of multiple mips of the same image at the
2822 * bind our internal depth buffer that contains the VRS data as part of HTILE.
3186 return prolog_entry->data;
3204 return prolog_entry->data;
6694 /* just reset draw state for vertex data */
7848 /* We'll have to copy data from the API BO. */
7859 /* Copy data from the API BO so that the format is suitable for the
8223 * in the upload buffer and copy the data to it.