Lines Matching refs:res1
40 //~gfx9! v1: %res1 = v_mul_f32 0x123456, %neg_a
41 //~gfx10! v1: %res1 = v_mul_f32 0x123456, -%a
42 //! p_unit_test 1, %res1
102 //! v1: %res1 = v_add_f32 %a, %b *2
103 //! p_unit_test 1, %res1
285 //! v1: %res1 = v_cndmask_b32 0, 42, %c
286 //! p_unit_test 1, %res1
336 //~gfx8! v1: %res1, s2: %_ = v_add_co_u32 %add1, %add_co1
339 //~gfx(9|10)! v1: %res1 = v_add_u32 %lshl1, %lshl_add
340 //! p_unit_test 1, %res1
411 //! v1: %res1 = v_bcnt_u32_b32 %a, %b
412 //! p_unit_test 1, %res1
494 //! v1: %res1 = @med3 @lb, @ub, %a
495 //! p_unit_test 1, %res1
567 //! s2: %res1 = v_cmp_nge_f32 4.0, %a
568 //! p_unit_test 1, %res1
698 //! v1: %res1 = v_add_u32 %a, %tmp1
699 //! p_unit_test 1, %res1
728 //! v1: %res1 = v_max3_f32 0, -0, -%a
729 //! p_unit_test 1, %res1
750 //! v1: %_, s2: %res1 = v_add_co_u32 %a, %res1_tmp
751 //! p_unit_test 1, %res1
775 //~gfx8! v1: %res1, s2: %_ = v_add_co_u32 %lshl1, %b
776 //~gfx(9|10)! v1: %res1 = v_lshl_add_u32 (is24bit)%a, 7, %b
777 //! p_unit_test 1, %res1
975 //! v1: %res1 = v_subrev_f32 %a, %b row_mirror bound_ctrl:1
976 //! p_unit_test 1, %res1
978 Temp res1 = bld.vop2(aco_opcode::v_sub_f32, bld.def(v1), b, tmp1);
979 writeout(1, res1);
1062 //! v1: %res1 = v_mul_f32 %a, %one row_shl:1 bound_ctrl:1
1063 //! p_unit_test 1, %res1
1110 //! v1: %res1 = v_mul_f32 %res1_tmp, %a
1111 //! p_unit_test 1, %res1
1177 //! v1: %res1 = v_fma_mix_f32 1.0, %a, lo(%a16)
1178 //! p_unit_test 1, %res1
1216 //! v2b: (precise)%res1 = v_mul_f16 %a16, %res1_cvt
1217 //! p_unit_test 1, %res1
1266 //! v1: %res1 = v_fma_mix_f32 |%a|, lo(%a16), -0
1267 //! p_unit_test 1, %res1
1363 //! v2b: %res1 = v_fma_mixlo_f16 1.0, %a, %b
1364 //! p_unit_test 1, %res1
1403 //! v1: %res1 = v_cvt_f32_f16 %res1_tmp
1404 //! p_unit_test 1, %res1
1431 //! v2b: %res1 = v_cvt_f16_f32 -%res1_add
1432 //! p_unit_test 1, %res1
1478 //! v1: %res1 = v_fma_mix_f32 %a, %b, lo(%c16)
1479 //! p_unit_test 1, %res1
1535 //~gfx9! v1: (precise)%res1 = v_fma_mix_f32 lo(%a16), %b, %c
1537 //~gfx10! v1: (precise)%res1 = v_add_f32 %res1_tmp, %c
1538 //! p_unit_test 1, %res1
1591 //! v2b: %res1 = v_fma_mixlo_f16 %a, %a, -0 clamp
1592 //! p_unit_test 1, %res1
1624 //! v1: %res1 = v_mul_f32 %res1_cvt, %a
1625 //! p_unit_test 1, %res1