Lines Matching refs:physReg
165 check((instr->definitions[0].isFixed() && instr->definitions[0].physReg() == vcc) ||
197 check(instr->operands[2].isFixed() && instr->operands[2].physReg() == vcc,
201 check(instr->definitions[1].isFixed() && instr->definitions[1].physReg() == vcc,
496 instr->definitions[1].physReg() == scc,
655 check((op.isTemp() && op.regClass().type() == RegType::vgpr) || op.physReg() == m0,
792 unsigned byte = op.physReg().byte();
854 unsigned byte = def.physReg().byte();
981 regs[def.physReg().reg_b + j] = 0;
1022 if (assignments[op.tempId()].valid && assignments[op.tempId()].reg != op.physReg())
1027 op.physReg().reg_b + op.bytes() > (256 + program->config->num_vgprs) * 4) ||
1029 op.physReg() + op.size() > program->config->num_sgprs &&
1030 op.physReg() < sgpr_limit))
1033 if (op.physReg() == vcc && !program->needs_vcc)
1042 assignments[op.tempId()].reg = op.physReg();
1058 def.physReg().reg_b + def.bytes() > (256 + program->config->num_vgprs) * 4) ||
1060 def.physReg() + def.size() > program->config->num_sgprs &&
1061 def.physReg() < sgpr_limit))
1064 if (def.physReg() == vcc && !program->needs_vcc)
1073 assignments[def.tempId()].reg = def.physReg();
1166 regs[op.physReg().reg_b + j] = 0;
1180 regs[op.physReg().reg_b + j] = 0;