Lines Matching defs:def
169 const Definition& def = instr->definitions[0];
170 check(def.bytes() <= 4, "SDWA definitions must not be larger than 4 bytes",
172 check(def.bytes() >= sdwa.dst_sel.size() + sdwa.dst_sel.offset(),
179 check(def.bytes() == 4 || def.bytes() == sdwa.dst_sel.size(),
182 check(def.bytes() == 4 || sdwa.dst_sel.offset() == 0,
426 for (const Definition& def : instr->definitions) {
427 size += def.bytes();
432 for (const Definition& def : instr->definitions)
433 check(def.regClass().type() == RegType::vgpr,
436 for (const Definition& def : instr->definitions)
437 check(program->gfx_level >= GFX9 || !def.regClass().is_subdword(),
853 Definition def = instr->definitions[0];
854 unsigned byte = def.physReg().byte();
888 Definition def = instr->definitions[index];
891 return gfx_level >= GFX8 ? def.bytes() : def.size() * 4u;
893 assert(def.bytes() <= 2);
905 return program->dev.sram_ecc_enabled ? def.size() * 4u : def.bytes();
936 default: return def.size() * 4;
948 Definition& def = instr->definitions[i];
949 if (!def.isTemp())
951 Temp tmp = def.getTemp();
961 if (def.regClass().is_subdword() && def.bytes() < 4) {
967 if (regs[written_reg] && regs[written_reg] != def.tempId())
976 for (const Definition& def : instr->definitions) {
977 if (!def.isTemp())
979 if (def.isKill()) {
980 for (unsigned j = 0; j < def.getTemp().bytes(); j++)
981 regs[def.physReg().reg_b + j] = 0;
1048 Definition& def = instr->definitions[i];
1049 if (!def.isTemp())
1051 if (!def.isFixed())
1054 if (assignments[def.tempId()].defloc.block)
1055 err |= ra_fail(program, loc, assignments[def.tempId()].defloc,
1056 "Temporary %%%d also defined by instruction", def.tempId());
1057 if ((def.getTemp().type() == RegType::vgpr &&
1058 def.physReg().reg_b + def.bytes() > (256 + program->config->num_vgprs) * 4) ||
1059 (def.getTemp().type() == RegType::sgpr &&
1060 def.physReg() + def.size() > program->config->num_sgprs &&
1061 def.physReg() < sgpr_limit))
1062 err |= ra_fail(program, loc, assignments[def.tempId()].firstloc,
1064 if (def.physReg() == vcc && !program->needs_vcc)
1067 if (def.regClass().is_subdword() &&
1070 if (!assignments[def.tempId()].firstloc.block)
1071 assignments[def.tempId()].firstloc = loc;
1072 assignments[def.tempId()].defloc = loc;
1073 assignments[def.tempId()].reg = def.physReg();
1074 assignments[def.tempId()].valid = true;
1124 for (const Definition& def : instr->definitions) {
1125 if (!def.isTemp())
1127 live.erase(def.tempId());