Lines Matching defs:program
67 Program* program;
91 : target_pressure(target_pressure_), program(program_),
92 register_demand(std::move(register_demand_)), renames(program->blocks.size()),
93 spills_entry(program->blocks.size()), spills_exit(program->blocks.size()),
94 processed(program->blocks.size(), false), wave_size(program->wave_size),
149 get_dominator(int idx_a, int idx_b, Program* program, bool is_linear)
159 idx_a = program->blocks[idx_a].linear_idom;
161 idx_b = program->blocks[idx_b].linear_idom;
166 idx_a = program->blocks[idx_a].logical_idom;
168 idx_b = program->blocks[idx_b].logical_idom;
178 Block* block = &ctx.program->blocks[block_idx];
254 if (ctx.program->blocks[pred_idx].loop_nest_depth > block->loop_nest_depth)
262 dom = get_dominator(dom, entry_distance.first, ctx.program, temp.is_linear());
276 ctx.next_use_distances_start.resize(ctx.program->blocks.size());
277 ctx.next_use_distances_end.resize(ctx.program->blocks.size());
279 uint32_t worklist = ctx.program->blocks.size();
365 for (Block& block : ctx.program->blocks) {
444 aco_ptr<Instruction>& instr = ctx.program->blocks[block_idx].instructions[idx];
457 Block& block = ctx.program->blocks[block_idx];
496 if (block->loop_nest_depth > ctx.program->blocks[block_idx - 1].loop_nest_depth) {
507 while (ctx.program->blocks[i].loop_nest_depth >= block->loop_nest_depth) {
508 assert(ctx.program->blocks.size() > i);
509 loop_demand.update(ctx.program->blocks[i++].register_demand);
792 Temp new_name = ctx.program->allocateTmp(live.first.regClass());
827 Temp new_name = ctx.program->allocateTmp(live.first.regClass());
914 Block& pred = ctx.program->blocks[pred_idx];
972 Block& pred = ctx.program->blocks[pred_idx];
1017 Temp new_name = ctx.program->allocateTmp(tmp.regClass());
1018 Block& pred = ctx.program->blocks[pred_idx];
1033 phi->operands[i] = Operand(exec, ctx.program->lane_mask);
1068 Temp new_name = ctx.program->allocateTmp(pair.first.regClass());
1069 Block& pred = ctx.program->blocks[pred_idx];
1111 rename = ctx.program->allocateTmp(pair.first.regClass());
1203 Temp new_tmp = ctx.program->allocateTmp(op.regClass());
1283 Block* block = &ctx.program->blocks[block_idx];
1322 ctx.program->blocks[block_idx + 1].loop_nest_depth >= block->loop_nest_depth)
1337 Block& current = ctx.program->blocks[idx];
1396 Builder bld(ctx.program);
1401 if (!(ctx.program->blocks[block_idx].kind & block_kind_top_level))
1405 std::vector<aco_ptr<Instruction>>& prev_instructions = ctx.program->blocks[block_idx].instructions;
1415 if (ctx.program->gfx_level >= GFX9)
1418 Temp private_segment_buffer = ctx.program->private_segment_buffer;
1419 if (ctx.program->stage.hw != HWStage::CS)
1428 S_008F0C_ADD_TID_ENABLE(1) | S_008F0C_INDEX_STRIDE(ctx.program->wave_size == 64 ? 3 : 2);
1430 if (ctx.program->gfx_level >= GFX10) {
1433 S_008F0C_RESOURCE_LEVEL(ctx.program->gfx_level < GFX11);
1434 } else if (ctx.program->gfx_level <= GFX7) {
1440 if (ctx.program->gfx_level <= GFX8)
1452 Temp scratch_offset = ctx.program->scratch_offset;
1455 if (ctx.program->gfx_level >= GFX9) {
1456 *offset += ctx.program->dev.scratch_global_offset_min;
1459 int32_t saddr = ctx.program->config->scratch_bytes_per_wave / ctx.program->wave_size -
1460 ctx.program->dev.scratch_global_offset_min;
1466 ctx.program->config->scratch_bytes_per_wave / ctx.program->wave_size +
1470 *offset += ctx.program->config->scratch_bytes_per_wave / ctx.program->wave_size;
1474 add_offset_to_sgpr ? ctx.program->config->scratch_bytes_per_wave : 0;
1485 ctx.program->config->spilled_vgprs += spill->operands[0].size();
1497 Builder bld(ctx.program, &instructions);
1507 if (ctx.program->gfx_level >= GFX9) {
1513 ctx.program->scratch_offset, elem, offset, false, true);
1517 } else if (ctx.program->gfx_level >= GFX9) {
1522 ctx.program->scratch_offset, temp, offset, false, true);
1539 Builder bld(ctx.program, &instructions);
1547 if (ctx.program->gfx_level >= GFX9) {
1554 Operand(v1), ctx.program->scratch_offset, offset, false, true);
1559 } else if (ctx.program->gfx_level >= GFX9) {
1564 Operand(v1), ctx.program->scratch_offset, offset, false, true);
1713 for (Block& block : ctx.program->blocks) {
1765 Builder bld(ctx.program, &instructions);
1778 ctx.program->config->spilled_sgprs += (*it)->operands[0].size();
1784 Temp linear_vgpr = ctx.program->allocateTmp(v1.as_linear());
1797 ctx.program->blocks[last_top_level_block_idx].instructions;
1825 Temp linear_vgpr = ctx.program->allocateTmp(v1.as_linear());
1838 ctx.program->blocks[last_top_level_block_idx].instructions;
1859 ctx.program->config->scratch_bytes_per_wave +=
1860 align(ctx.vgpr_spill_slots * 4 * ctx.program->wave_size, 1024);
1868 for (Block& block : ctx.program->blocks) {
1887 Block& pred = ctx.program->blocks[pred_idx];
1918 spill(Program* program, live& live_vars)
1920 program->config->spilled_vgprs = 0;
1921 program->config->spilled_sgprs = 0;
1923 program->progress = CompilationProgress::after_spilling;
1926 if (program->num_waves > 0)
1930 lower_to_cssa(program, live_vars);
1933 const RegisterDemand demand = program->max_reg_demand; /* current max */
1934 const uint16_t sgpr_limit = get_addr_sgpr_from_waves(program, program->min_waves);
1935 const uint16_t vgpr_limit = get_addr_vgpr_from_waves(program, program->min_waves);
1942 extra_vgprs = DIV_ROUND_UP(sgpr_spills, program->wave_size) + 1;
1946 if (program->gfx_level >= GFX9)
1953 extra_vgprs = DIV_ROUND_UP(sgpr_spills, program->wave_size) + 1;
1960 spill_ctx ctx(target, program, live_vars.register_demand);
1965 for (unsigned i = 0; i < program->blocks.size(); i++)
1972 live_vars = live_var_analysis(program);
1974 assert(program->num_waves > 0);