Lines Matching defs:block

99    Block* block;
210 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx];
249 const RegisterDemand temp2 = get_temp_registers(block->instructions[dest_insert_idx - 1]);
255 move_element(block->instructions.begin(), cursor.source_idx, dest_insert_idx);
284 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx];
337 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx];
357 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx];
375 const RegisterDemand temp2 = get_temp_registers(block->instructions[cursor.insert_idx - 1]);
382 move_element(block->instructions.begin(), cursor.source_idx, cursor.insert_idx);
405 aco_ptr<Instruction>& instr = block->instructions[cursor.source_idx];
644 schedule_SMEM(sched_ctx& ctx, Block* block, std::vector<RegisterDemand>& register_demand,
667 aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
729 assert(candidate_idx < (int)block->instructions.size());
730 aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
787 schedule_VMEM(sched_ctx& ctx, Block* block, std::vector<RegisterDemand>& register_demand,
810 aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
843 block->instructions[candidate_idx - prev_clause_size].get()))
903 assert(candidate_idx < (int)block->instructions.size());
904 aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
959 schedule_position_export(sched_ctx& ctx, Block* block, std::vector<RegisterDemand>& register_demand,
976 aco_ptr<Instruction>& candidate = block->instructions[candidate_idx];
1006 schedule_block(sched_ctx& ctx, Program* program, Block* block, live& live_vars)
1010 ctx.mv.block = block;
1011 ctx.mv.register_demand = live_vars.register_demand[block->index].data();
1014 for (unsigned idx = 0; idx < block->instructions.size(); idx++) {
1015 Instruction* current = block->instructions[idx].get();
1017 if (block->kind & block_kind_export_end && current->isEXP() && ctx.schedule_pos_exports) {
1021 schedule_position_export(ctx, block, live_vars.register_demand[block->index], current,
1031 schedule_VMEM(ctx, block, live_vars.register_demand[block->index], current, idx);
1036 schedule_SMEM(ctx, block, live_vars.register_demand[block->index], current, idx);
1040 /* resummarize the block's register demand */
1041 block->register_demand = RegisterDemand();
1042 for (unsigned idx = 0; idx < block->instructions.size(); idx++) {
1043 block->register_demand.update(live_vars.register_demand[block->index][idx]);
1052 for (Block& block : program->blocks)
1053 demand.update(block.register_demand);
1095 for (Block& block : program->blocks)
1096 schedule_block(ctx, program, &block, live_vars);
1100 for (Block& block : program->blocks) {
1101 new_demand.update(block.register_demand);