Lines Matching refs:first
154 static PhysRegInterval from_until(PhysReg first, PhysReg end) { return {first, end - first}; }
220 stride = info.first;
363 subdword_regs.emplace(i, std::array<uint32_t, 4>{0, 0, 0, 0}).first->second;
470 const auto& first_reg = reg_and_var.first;
479 PhysReg last_reg = first_reg.advance(size_id.first - 1);
775 reg_file.clear(copy.first);
789 if (def.isTemp() && def.getTemp() == it->first.getTemp()) {
806 if (it->first.getTemp() == other.second.getTemp()) {
834 bool first = true;
840 if (op.tempId() == copy.first.tempId()) {
844 omit_renaming &= def_reg > copy.first.physReg()
845 ? (copy.first.physReg() + copy.first.size() <= def_reg.reg())
846 : (def_reg + pc.second.size() <= copy.first.physReg().reg());
849 if (first)
853 first = false;
965 assert(reg_file[PhysReg{entry.first}] == 0xF0000000);
966 if (!bounds.contains({PhysReg{entry.first}, rc.size()}))
977 reg_found = (reg_file[PhysReg{entry.first + 1}] == 0);
980 PhysReg res{entry.first};
982 adjust_max_used_regs(ctx, rc, entry.first);
1133 reg_file.block(res.first, var.rc);
1139 Definition pc_def = Definition(res.first, pc_op.regClass());
1280 /* first check if the register window starts in the middle of an
1395 if (rc.is_subdword() && reg.byte() % sdw_def_info.first)
1522 PhysReg first{512};
1529 if (first.reg() == 512) {
1531 first = reg.advance(i * -4);
1532 PhysRegInterval vec = PhysRegInterval{first, instr->operands.size() - 3u};
1536 if (reg != first.advance(i * 4)) /* not at the best position */
1543 if (first.reg() != 512 && reg_file.test(first.advance(i * 4), 4))
1593 PhysReg reg = res.first;
1643 return res.first;
1653 return res.first;
1660 return res.first;
1821 return res.first;
2009 if ((*phi_it)->definitions[0].tempId() == pc.first.tempId())
2022 std::unordered_map<unsigned, Temp>::iterator orig_it = ctx.orig_names.find(pc.first.tempId());
2023 Temp orig = pc.first.getTemp();
2033 pc.first.getTemp().is_linear() ? aco_opcode::p_linear_phi : aco_opcode::p_phi;
2035 pc.first.getTemp().is_linear() ? block.linear_preds : block.logical_preds;
2040 new_phi->operands[i] = Operand(pc.first);
2221 if (!it.second && it.first->second == prev)
2222 it.first->second = renamed;
2373 /* first, compute the death points of all live vars within the block */
2505 /* visit the loop header phis first in order to create nested affinities */
2821 /* handle fixed definitions first */
2878 reg = res.first;
2959 linear_vgpr |= parallelcopy[i].first.regClass().is_linear_vgpr();
2961 if (temp_in_scc && parallelcopy[i].first.isTemp() &&
2962 parallelcopy[i].first.getTemp().type() == RegType::sgpr) {
2964 unsigned reg = parallelcopy[i].first.physReg().reg();
2965 unsigned size = parallelcopy[i].first.getTemp().size();
2975 pc->operands[i] = parallelcopy[i].first;
3027 /* if the first operand is a literal, we have to move it to a reg */