Lines Matching refs:assigned
53 bool assigned : 1;
60 assignment(PhysReg reg_, RegClass rc_) : reg(reg_), rc(rc_), assigned(-1) {}
63 assigned = true;
1017 * increasing assigned register
1094 /* Variables are sorted from large to small and with increasing assigned register */
1456 * one. If one of the variables has 0xffffffff as an ID, the register assigned
1526 if (ctx.assignments[op.tempId()].assigned) {
1568 * - whether the operand is assigned and
1574 ctx.assignments[op.tempId()].assigned) {
1615 if (affinity.assigned) {
1628 if (affinity.assigned) {
1672 if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type())
1703 if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type())
2096 ctx.assignments[ctx.assignments[definition.tempId()].affinity].assigned) {
2123 /* find registers for phis where the register was blocked or no operand was assigned */
2190 assert(ctx.assignments[ops[i].id()].assigned);
2326 assert(var.assigned);
2350 if (var.assigned) {
2571 if (affinity.assigned && affinity.reg != instr->operands[2].physReg() &&
2626 if (affinity.assigned && affinity.reg != instr->operands[!literal_idx].physReg() &&
2763 assert(ctx.assignments[operand.tempId()].assigned);
3008 /* some instructions need VOP3 encoding if operand/definition is not assigned to VCC */