Lines Matching defs:operand
208 DefInfo(ra_ctx& ctx, aco_ptr<Instruction>& instr, RegClass rc_, int operand) : rc(rc_)
215 if (rc.is_subdword() && operand >= 0) {
217 stride = get_subdword_operand_stride(ctx.program->gfx_level, instr, operand, rc);
241 bool imageGather4D16Bug = operand == -1 && rc == v2 && instr->mimg().dmask != 0xF;
811 /* check if we moved an operand, again */
815 // FIXME: ensure that the operand can use this reg
833 /* check if we moved an operand */
1046 /* dead operand: return position in vector */
1063 /* try to use the previous register of the operand */
1074 /* if everything matches, create parallelcopy for the killed operand */
1100 /* check if this is a dead operand, then we can re-use the space from the definition
1540 /* If there's an unexpected temporary, this operand is unlikely to be
1567 /* check for every operand of the vector
1568 * - whether the operand is assigned and
1569 * - we can use the register relative to that operand
1732 /* test for each operand which definition placement causes the least shuffle instructions */
1953 aco_ptr<Instruction>& instr, Operand& operand, unsigned operand_index)
1955 /* check if the operand is fixed */
1956 PhysReg src = ctx.assignments[operand.tempId()].reg;
1958 if (operand.isFixed()) {
1959 assert(operand.physReg() != src);
1962 if (register_file.test(operand.physReg(), operand.bytes())) {
1963 PhysRegInterval target{operand.physReg(), operand.size()};
1969 tmp_file.clear(src, operand.regClass()); // TODO: try to avoid moving block vars to src
1970 tmp_file.block(operand.physReg(), operand.regClass());
1972 DefInfo info(ctx, instr, operand.regClass(), -1);
1976 dst = operand.physReg();
1979 /* clear the operand in case it's only a stride mismatch */
1980 register_file.clear(src, operand.regClass());
1981 dst = get_reg(ctx, register_file, operand.getTemp(), parallelcopy, instr, operand_index);
1984 Operand pc_op = operand;
2088 /* try to find a register that is used by at least one operand */
2123 /* find registers for phis where the register was blocked or no operand was assigned */
2250 /* Find the original name, since this operand might not use the original name if the phi
2314 Operand& operand = instr->operands[0];
2315 if (operand.isTemp()) {
2316 operand.setTemp(read_variable(ctx, operand.getTemp(), block.index - 1));
2317 operand.setFixed(ctx.assignments[operand.tempId()].reg);
2338 Operand& operand = instr->operands[i];
2339 if (!operand.isTemp())
2341 operand.setTemp(read_variable(ctx, operand.getTemp(), preds[i]));
2342 operand.setFixed(ctx.assignments[operand.tempId()].reg);
2407 * s_cbranch_vccz/s_cbranch_vccnz if the operand is VCC.
2426 /* mark last-seen phi operand */
2757 auto& operand = instr->operands[i];
2758 if (!operand.isTemp())
2762 operand.setTemp(read_variable(ctx, operand.getTemp(), block.index));
2763 assert(ctx.assignments[operand.tempId()].assigned);
2765 PhysReg reg = ctx.assignments[operand.tempId()].reg;
2766 if (operand_can_use_reg(program->gfx_level, instr, i, reg, operand.regClass()))
2767 operand.setFixed(reg);
2769 get_reg_for_operand(ctx, register_file, parallelcopy, instr, operand, i);
2773 for (unsigned j = 0; j < operand.size(); j++)
2774 ctx.war_hint.set(operand.physReg().reg() + j);
2786 /* Handle definitions which must have the same register as an operand.
2787 * We expect that the definition has the same size as the operand, otherwise the new
2788 * location for the operand (if it's not killed) might intersect with the old one.
2790 * location because that's used by a live-through operand.
2979 /* it might happen that the operand is already renamed. we have to restore the
3008 /* some instructions need VOP3 encoding if operand/definition is not assigned to VCC */
3027 /* if the first operand is a literal, we have to move it to a reg */