Lines Matching defs:info
219 std::pair<unsigned, unsigned> info = get_subdword_definition_info(ctx.program, instr, rc);
220 stride = info.first;
221 if (info.second > rc.bytes()) {
222 rc = RegClass::get(rc.type(), info.second);
227 stride = align(stride, info.second);
871 get_reg_simple(ra_ctx& ctx, RegisterFile& reg_file, DefInfo info)
873 const PhysRegInterval& bounds = info.bounds;
874 uint32_t size = info.size;
875 uint32_t stride = info.rc.is_subdword() ? DIV_ROUND_UP(info.stride, 4) : info.stride;
876 RegClass rc = info.rc;
878 DefInfo new_info = info;
969 for (unsigned i = 0; i < 4; i += info.stride) {
1043 DefInfo info, unsigned id)
1051 return {reg, info.rc.is_subdword() || reg.byte() == 0};
1061 if (def_reg.contains(PhysRegInterval{var.reg, info.size})) {
1072 instr->operands[i].regClass() == info.rc) {
1077 Definition pc_def = Definition(reg, info.rc);
1097 DefInfo info = DefInfo(ctx, ctx.pseudo_dummy, var.rc, -1);
1098 uint32_t size = info.size;
1106 get_reg_for_create_vector_copy(ctx, reg_file, parallelcopies, instr, def_reg, info, id);
1110 info = DefInfo(ctx, instr, var.rc, i);
1112 info.bounds = def_reg;
1113 res = get_reg_simple(ctx, reg_file, info);
1122 info.bounds = PhysRegInterval::from_until(bounds.lo(), MIN2(def_reg.lo(), bounds.hi()));
1123 res = get_reg_simple(ctx, reg_file, info);
1125 unsigned lo = (def_reg.hi() + info.stride - 1) & ~(info.stride - 1);
1126 info.bounds = PhysRegInterval::from_until(PhysReg{lo}, bounds.hi());
1127 res = get_reg_simple(ctx, reg_file, info);
1149 unsigned stride = var.rc.is_subdword() ? 1 : info.stride;
1237 std::vector<std::pair<Operand, Definition>>& parallelcopies, const DefInfo& info,
1240 const PhysRegInterval& bounds = info.bounds;
1241 uint32_t size = info.size;
1242 uint32_t stride = info.stride;
1243 RegClass rc = info.rc;
1449 IDAndInfo(unsigned id_, DefInfo info_) : id(id_), info(info_) {}
1452 DefInfo info;
1468 DefInfo info(ctx, ctx.pseudo_dummy, var.rc, -1);
1469 sorted.emplace_back(var.id, info);
1476 unsigned a_stride = a.info.stride * (a.info.rc.is_subdword() ? 1 : 4);
1477 unsigned b_stride = b.info.stride * (b.info.rc.is_subdword() ? 1 : 4);
1491 unsigned stride = var.info.rc.is_subdword() ? var.info.stride : var.info.stride * 4;
1511 adjust_max_used_regs(ctx, var.info.rc, next_reg);
1513 next_reg = next_reg.advance(var.info.rc.size() * 4);
1591 DefInfo info(ctx, ctx.pseudo_dummy, vec_rc, -1);
1592 std::pair<PhysReg, bool> res = get_reg_simple(ctx, reg_file, info);
1646 DefInfo info(ctx, instr, temp.regClass(), operand_index);
1650 res = get_reg_simple(ctx, reg_file, info);
1657 res = get_reg_impl(ctx, reg_file, parallelcopies, info, instr);
1666 assert(reg_file.count_zero(info.bounds) >= info.size);
1668 if (!increase_register_file(ctx, info.rc.type())) {
1670 unsigned def_size = info.rc.size();
1672 if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type())
1678 if (op.isTemp() && op.isKillBeforeDef() && op.regClass().type() == info.rc.type())
1682 const PhysRegInterval regs = get_reg_bounds(ctx.program, info.rc.type());
1688 vars.emplace_back(0xffffffff, RegClass(info.rc.type(), MAX2(def_size, killed_op_size)));
1695 if (op.isKillBeforeDef() && op.regClass().type() == info.rc.type())
1703 if (ctx.assignments[def.tempId()].assigned && def.regClass().type() == info.rc.type())
1706 def_vars.emplace_back(0xffffffff, info.rc);
1818 DefInfo info(ctx, instr, rc, -1);
1819 std::pair<PhysReg, bool> res = get_reg_simple(ctx, reg_file, info);
1972 DefInfo info(ctx, instr, operand.regClass(), -1);
1973 get_regs_for_copies(ctx, tmp_file, parallelcopy, blocking_vars, info.bounds, instr,
2843 DefInfo info(ctx, instr, definition.regClass(), -1);
2844 success = get_regs_for_copies(ctx, tmp_file, parallelcopy, vars, info.bounds, instr,
2876 DefInfo info(ctx, ctx.pseudo_dummy, vec_rc, -1);
2877 std::pair<PhysReg, bool> res = get_reg_simple(ctx, register_file, info);