Lines Matching defs:idx
41 unsigned idx, RegClass rc);
42 void add_subdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, unsigned byte,
494 unsigned idx, RegClass rc)
510 if (can_use_opsel(gfx_level, instr->opcode, idx))
534 add_subdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, unsigned byte,
546 instr->vop3().opsel |= 1 << idx;
550 assert(byte == 2 && !(instr->vop3p().opsel_lo & (1 << idx)));
551 instr->vop3p().opsel_lo |= 1 << idx;
552 instr->vop3p().opsel_hi |= 1 << idx;
1913 operand_can_use_reg(amd_gfx_level gfx_level, aco_ptr<Instruction>& instr, unsigned idx, PhysReg reg,
1916 if (instr->operands[idx].isFixed())
1917 return instr->operands[idx].physReg() == reg;
1921 if (gfx_level <= GFX9 && is_writelane && idx <= 1) {
1924 instr->operands[!idx].isTemp() &&
1925 (!instr->operands[!idx].isFixed() || instr->operands[!idx].physReg() != m0);
1926 if (is_other_sgpr && instr->operands[!idx].tempId() != instr->operands[idx].tempId()) {
1927 instr->operands[idx].setFixed(m0);
1933 unsigned stride = get_subdword_operand_stride(gfx_level, instr, idx, rc);
1941 (reg != m0 || idx == 1 || idx == 3) && /* offset can be m0 */
1942 (reg != vcc || (instr->definitions.empty() && idx == 2) ||
2218 for (unsigned idx = loop_header_idx; idx < loop_exit_idx; idx++) {
2219 auto it = ctx.renames[idx].emplace(val.id(), renamed);
2266 for (unsigned idx = loop_header_idx; idx < loop_exit_idx; idx++) {
2267 Block& current = ctx.program->blocks[idx];
2271 if (idx == loop_header_idx && is_phi(instr))
2719 unsigned idx = 0;
2720 for (; idx < succ.logical_preds.size(); idx++) {
2721 if (succ.logical_preds[idx] == block.index)
2726 if (phi->operands[idx].isTemp() &&
2727 phi->operands[idx].getTemp().type() == RegType::sgpr &&
2728 phi->operands[idx].isFirstKillBeforeDef()) {
2730 read_variable(ctx, phi->operands[idx].getTemp(), block.index));