Lines Matching defs:byte
42 void add_subdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, unsigned byte,
278 for (unsigned j = i.byte(); i * 4 + j < start.reg_b + num_bytes && j < 4; j++) {
300 for (unsigned i = start.byte(); i < 4; i++)
312 return subdword_regs[start][start.byte()] + 1 <= 1;
347 return regs[reg] == 0xF0000000 ? subdword_regs[reg][reg.byte()] : regs[reg];
364 for (unsigned j = i.byte(); i * 4 + j < start.reg_b + num_bytes && j < 4; j++)
461 regs_to_vars; /* maps to byte size and temp id */
481 assert(first_reg.byte() == 0 && last_reg.byte() == 3);
485 if (first_reg.byte() != 0 || last_reg.byte() != 3) {
486 printf("[%d:%d]", first_reg.byte() * 8, (last_reg.byte() + 1) * 8);
534 add_subdword_operand(ra_ctx& ctx, aco_ptr<Instruction>& instr, unsigned idx, unsigned byte,
538 if (instr->isPseudo() || byte == 0)
545 assert(byte == 2);
550 assert(byte == 2 && !(instr->vop3p().opsel_lo & (1 << idx)));
556 switch (byte) {
571 assert(byte == 2);
684 if (reg.byte() == 0 && instr_is_16bit(gfx_level, instr->opcode))
689 assert(reg.byte() == 2);
706 if (reg.byte() == 0)
1051 return {reg, info.rc.is_subdword() || reg.byte() == 0};
1254 !reg_file.test(PhysReg{op.physReg().reg()}, align(op.bytes() + op.physReg().byte(), 4))) {
1395 if (rc.is_subdword() && reg.byte() % sdw_def_info.first)
1397 if (!rc.is_subdword() && reg.byte())
1596 /* make sure to only use byte offset if the instruction supports it */
1932 if (reg.byte()) {
1934 if (reg.byte() % stride)
2561 instr->usesModifiers() || instr->operands[0].physReg().byte() != 0 ||
2562 instr->operands[1].physReg().byte() != 0 || instr->operands[2].physReg().byte() != 0)
2911 if (reg.byte() || register_file.test(reg, 4)) {
2945 if (op.isTemp() && op.physReg().byte() != 0)
2946 add_subdword_operand(ctx, instr, i, op.physReg().byte(), op.regClass());