Lines Matching defs:block
42 bool operator==(const Idx& other) const { return block == other.block && instr == other.instr; }
45 bool found() const { return block != UINT32_MAX; }
47 uint32_t block;
63 void reset_block(Block* block)
65 current_block = block;
68 if ((block->kind & block_kind_loop_header) || block->linear_preds.empty()) {
69 std::fill(instr_idx_by_regs[block->index].begin(), instr_idx_by_regs[block->index].end(),
72 const uint32_t first_linear_pred = block->linear_preds[0];
73 const std::vector<uint32_t>& linear_preds = block->linear_preds;
82 instr_idx_by_regs[block->index][i] = instr_idx_by_regs[first_linear_pred][i];
84 instr_idx_by_regs[block->index][i] = written_by_multiple_instrs;
87 if (!block->logical_preds.empty()) {
89 * ie. any block that reads any VGPR has at least 1 logical predecessor.
91 const unsigned first_logical_pred = block->logical_preds[0];
92 const std::vector<uint32_t>& logical_preds = block->logical_preds;
102 instr_idx_by_regs[block->index][i] = instr_idx_by_regs[first_logical_pred][i];
104 instr_idx_by_regs[block->index][i] = written_by_multiple_instrs;
107 /* If a block has no logical predecessors, it is not part of the
109 * Such a block does not write any VGPRs ever.
111 assert(block->logical_succs.empty());
116 Instruction* get(Idx idx) { return program->blocks[idx.block].instructions[idx.instr].get(); }
189 if (i.block > idx.block || (i.block == idx.block && i.instr > idx.instr))
232 * - the operand register used by the branch, and VCC were both written in the current block
238 op0_instr_idx.block != ctx.current_block->index ||
239 last_vcc_wr_idx.block != ctx.current_block->index ||
502 for (auto& block : program->blocks) {
503 ctx.reset_block(&block);
505 for (aco_ptr<Instruction>& instr : block.instructions)
513 for (auto& block : program->blocks) {
514 auto new_end = std::remove_if(block.instructions.begin(), block.instructions.end(),
517 block.instructions.resize(new_end - block.instructions.begin());