Lines Matching defs:unsigned

231          unsigned denorm32 : 2;
232 unsigned denorm16_64 : 2;
340 constexpr RegClass(RegType type, unsigned size)
350 constexpr unsigned bytes() const { return ((unsigned)rc & 0x1F) * (is_subdword() ? 1 : 4); }
352 constexpr unsigned size() const { return (bytes() + 3) >> 2; }
357 static constexpr RegClass get(RegType type, unsigned bytes)
366 constexpr RegClass resize(unsigned bytes) const
414 constexpr unsigned bytes() const noexcept { return regClass().bytes(); }
415 constexpr unsigned size() const noexcept { return regClass().size(); }
435 explicit constexpr PhysReg(unsigned r) : reg_b(r << 2) {}
436 constexpr unsigned reg() const { return reg_b >> 2; }
437 constexpr unsigned byte() const { return reg_b & 0x3; }
438 constexpr operator unsigned() const { return reg(); }
540 op.setFixed(PhysReg{(unsigned)(192 - (int16_t)v)});
672 static Operand zero(unsigned bytes = 4) noexcept
687 static Operand get_const(enum amd_gfx_level chip, uint64_t val, unsigned bytes)
706 static bool is_constant_representable(uint64_t val, unsigned bytes, bool zext = false,
746 constexpr unsigned bytes() const noexcept
754 constexpr unsigned size() const noexcept
768 isFixed_ = reg != unsigned(-1);
945 constexpr unsigned bytes() const noexcept { return temp.bytes(); }
947 constexpr unsigned size() const noexcept { return temp.size(); }
1483 constexpr SubdwordSel(unsigned size, unsigned offset, bool sign_extend)
1489 constexpr unsigned size() const { return (sel >> 2) & 0x7; }
1490 constexpr unsigned offset() const { return sel & 0x3; }
1492 constexpr unsigned to_sdwa_sel(unsigned reg_byte_offset) const
1557 * Operand(2): SOFFSET - SGPR to supply unsigned byte offset. (SGPR, M0, or inline constant)
1584 * Operand(2): SOFFSET - SGPR to supply unsigned byte offset. (SGPR, M0, or inline constant)
1763 for (unsigned i = 0; i < operands.size(); i++) {
1774 for (unsigned i = 0; i < operands.size(); i++) {
1813 unsigned get_cmp_bitsize(aco_opcode op);
1818 uint32_t get_reduction_identity(ReduceOp op, unsigned idx);
1820 unsigned get_mimg_nsa_dwords(const Instruction* instr);
1919 unsigned index;
1920 unsigned offset = 0;
1922 std::vector<unsigned> logical_preds;
1923 std::vector<unsigned> linear_preds;
1924 std::vector<unsigned> logical_succs;
1925 std::vector<unsigned> linear_succs;
2001 unsigned num_sw_stages() const { return util_bitcount(static_cast<uint16_t>(sw)); }
2065 unsigned max_wave64_per_simd;
2066 unsigned simd_per_cu;
2093 unsigned wave_size;
2105 unsigned workgroup_size; /* if known; otherwise UINT_MAX */
2117 unsigned next_loop_depth = 0;
2118 unsigned next_divergent_if_logical_depth = 0;
2119 unsigned next_uniform_if_depth = 0;
2137 void allocateRange(unsigned amount)
2190 void select_program(Program* program, unsigned shader_count, struct nir_shader* const* shaders,
2208 unsigned* num_preserved_sgprs);
2237 unsigned emit_program(Program* program, std::vector<uint32_t>& code);
2243 bool print_asm(Program* program, std::vector<uint32_t>& binary, unsigned exec_size, FILE* output);
2265 void aco_print_operand(const Operand* operand, FILE* output, unsigned flags = 0);
2266 void aco_print_instr(const Instruction* instr, FILE* output, unsigned flags = 0);
2267 void aco_print_program(const Program* program, FILE* output, unsigned flags = 0);
2269 unsigned flags = 0);
2271 void _aco_perfwarn(Program* program, const char* file, unsigned line, const char* fmt, ...);
2272 void _aco_err(Program* program, const char* file, unsigned line, const char* fmt, ...);
2307 const unsigned operand_size[static_cast<int>(aco_opcode::num_opcodes)];