Lines Matching defs:bool
193 bool operator==(const memory_sync_info& rhs) const
198 bool can_reorder() const
241 bool preserve_signed_zero_inf_nan32 : 1;
242 bool preserve_signed_zero_inf_nan16_64 : 1;
244 bool must_flush_denorms32 : 1;
245 bool must_flush_denorms16_64 : 1;
246 bool care_about_round32 : 1;
247 bool care_about_round16_64 : 1;
251 bool canReplace(float_mode other) const noexcept
277 bool combine(const wait_imm& other);
279 bool empty() const;
345 explicit operator bool() = delete;
348 constexpr bool is_linear_vgpr() const { return rc & (1 << 6); };
349 constexpr bool is_subdword() const { return rc & (1 << 7); }
353 constexpr bool is_linear() const { return rc <= RC::s16 || is_linear_vgpr(); }
417 constexpr bool is_linear() const noexcept { return regClass().is_linear(); }
419 constexpr bool operator<(Temp other) const noexcept { return id() < other.id(); }
420 constexpr bool operator==(Temp other) const noexcept { return id() == other.id(); }
421 constexpr bool operator!=(Temp other) const noexcept { return id() != other.id(); }
439 constexpr bool operator==(PhysReg other) const { return reg_b == other.reg_b; }
440 constexpr bool operator!=(PhysReg other) const { return reg_b != other.reg_b; }
441 constexpr bool operator<(PhysReg other) const { return reg_b < other.reg_b; }
615 static Operand c32_or_c64(uint32_t v, bool is64bit) noexcept
706 static bool is_constant_representable(uint64_t val, unsigned bytes, bool zext = false,
707 bool sext = false)
729 constexpr bool isTemp() const noexcept { return isTemp_; }
742 constexpr bool hasRegClass() const noexcept { return isTemp() || isUndefined(); }
762 constexpr bool isFixed() const noexcept { return isFixed_; }
772 constexpr bool isConstant() const noexcept { return isConstant_; }
774 constexpr bool isLiteral() const noexcept { return isConstant() && reg_ == 255; }
776 constexpr bool isUndefined() const noexcept { return isUndef_; }
780 constexpr bool constantEquals(uint32_t cmp) const noexcept
812 constexpr uint16_t constantValue16(bool opsel) const noexcept
824 constexpr bool isOfType(RegType type) const noexcept
832 constexpr void setLateKill(bool flag) noexcept { isLateKill_ = flag; }
834 constexpr bool isLateKill() const noexcept { return isLateKill_; }
836 constexpr void setKill(bool flag) noexcept
843 constexpr bool isKill() const noexcept { return isKill_ || isFirstKill(); }
845 constexpr void setFirstKill(bool flag) noexcept
854 constexpr bool isFirstKill() const noexcept { return isFirstKill_; }
856 constexpr bool isKillBeforeDef() const noexcept { return isKill() && !isLateKill(); }
858 constexpr bool isFirstKillBeforeDef() const noexcept { return isFirstKill() && !isLateKill(); }
860 constexpr bool operator==(Operand other) const noexcept
878 constexpr bool operator!=(Operand other) const noexcept { return !operator==(other); }
880 constexpr void set16bit(bool flag) noexcept { is16bit_ = flag; }
882 constexpr bool is16bit() const noexcept { return is16bit_; }
884 constexpr void set24bit(bool flag) noexcept { is24bit_ = flag; }
886 constexpr bool is24bit() const noexcept { return is24bit_; }
933 constexpr bool isTemp() const noexcept { return tempId() > 0; }
949 constexpr bool isFixed() const noexcept { return isFixed_; }
959 constexpr void setKill(bool flag) noexcept { isKill_ = flag; }
961 constexpr bool isKill() const noexcept { return isKill_; }
963 constexpr void setPrecise(bool precise) noexcept { isPrecise_ = precise; }
965 constexpr bool isPrecise() const noexcept { return isPrecise_; }
968 constexpr void setNUW(bool nuw) noexcept { isNUW_ = nuw; }
970 constexpr bool isNUW() const noexcept { return isNUW_; }
972 constexpr void setNoCSE(bool noCSE) noexcept { isNoCSE_ = noCSE; }
974 constexpr bool isNoCSE() const noexcept { return isNoCSE_; }
1028 constexpr bool usesModifiers() const noexcept;
1030 constexpr bool reads_exec() const noexcept
1049 constexpr bool isPseudo() const noexcept { return format == Format::PSEUDO; }
1060 constexpr bool isSOP1() const noexcept { return format == Format::SOP1; }
1071 constexpr bool isSOP2() const noexcept { return format == Format::SOP2; }
1082 constexpr bool isSOPK() const noexcept { return format == Format::SOPK; }
1093 constexpr bool isSOPP() const noexcept { return format == Format::SOPP; }
1104 constexpr bool isSOPC() const noexcept { return format == Format::SOPC; }
1115 constexpr bool isSMEM() const noexcept { return format == Format::SMEM; }
1126 constexpr bool isDS() const noexcept { return format == Format::DS; }
1137 constexpr bool isMTBUF() const noexcept { return format == Format::MTBUF; }
1148 constexpr bool isMUBUF() const noexcept { return format == Format::MUBUF; }
1159 constexpr bool isMIMG() const noexcept { return format == Format::MIMG; }
1170 constexpr bool isEXP() const noexcept { return format == Format::EXP; }
1181 constexpr bool isFlat() const noexcept { return format == Format::FLAT; }
1192 constexpr bool isGlobal() const noexcept { return format == Format::GLOBAL; }
1203 constexpr bool isScratch() const noexcept { return format == Format::SCRATCH; }
1214 constexpr bool isBranch() const noexcept { return format == Format::PSEUDO_BRANCH; }
1225 constexpr bool isBarrier() const noexcept { return format == Format::PSEUDO_BARRIER; }
1236 constexpr bool isReduction() const noexcept { return format == Format::PSEUDO_REDUCTION; }
1247 constexpr bool isVOP3P() const noexcept { return format == Format::VOP3P; }
1258 constexpr bool isVOP1() const noexcept { return (uint16_t)format & (uint16_t)Format::VOP1; }
1269 constexpr bool isVOP2() const noexcept { return (uint16_t)format & (uint16_t)Format::VOP2; }
1280 constexpr bool isVOPC() const noexcept { return (uint16_t)format & (uint16_t)Format::VOPC; }
1291 constexpr bool isVOP3() const noexcept { return (uint16_t)format & (uint16_t)Format::VOP3; }
1302 constexpr bool isVINTRP() const noexcept { return (uint16_t)format & (uint16_t)Format::VINTRP; }
1313 constexpr bool isDPP16() const noexcept { return (uint16_t)format & (uint16_t)Format::DPP16; }
1324 constexpr bool isDPP8() const noexcept { return (uint16_t)format & (uint16_t)Format::DPP8; }
1325 constexpr bool isDPP() const noexcept { return isDPP16() || isDPP8(); }
1336 constexpr bool isSDWA() const noexcept { return (uint16_t)format & (uint16_t)Format::SDWA; }
1342 constexpr bool isFlatLike() const noexcept { return isFlat() || isGlobal() || isScratch(); }
1344 constexpr bool isVALU() const noexcept
1349 constexpr bool isSALU() const noexcept
1354 constexpr bool isVMEM() const noexcept { return isMTBUF() || isMUBUF() || isMIMG(); }
1396 bool glc : 1; /* VI+: globally coherent */
1397 bool dlc : 1; /* NAVI: device level coherent */
1398 bool nv : 1; /* VEGA only: Non-volatile */
1399 bool disable_wqm : 1;
1400 bool prevent_overflow : 1; /* avoid overflow when combining additions */
1415 bool abs[3];
1416 bool neg[3];
1419 bool clamp : 1;
1426 bool neg_lo[3];
1427 bool neg_hi[3]; /* abs modifier, for v_mad_mix/v_fma_mix */
1430 bool clamp : 1;
1443 bool abs[2];
1444 bool neg[2];
1448 bool bound_ctrl : 1;
1483 constexpr SubdwordSel(unsigned size, unsigned offset, bool sign_extend)
1487 explicit operator bool() const { return sel != 0; }
1491 constexpr bool sign_extend() const { return sel & sext; }
1520 bool neg[2];
1521 bool abs[2];
1522 bool clamp : 1;
1546 bool gds;
1563 bool offen : 1; /* Supply an offset from VGPR (VADDR) */
1564 bool idxen : 1; /* Supply an index from VGPR (VADDR) */
1565 bool addr64 : 1; /* SI, CIK: Address size is 64-bit */
1566 bool glc : 1; /* globally coherent */
1567 bool dlc : 1; /* NAVI: device level coherent */
1568 bool slc : 1; /* system level coherent */
1569 bool tfe : 1; /* texture fail enable */
1570 bool lds : 1; /* Return read-data to LDS instead of VGPRs */
1592 bool offen : 1; /* Supply an offset from VGPR (VADDR) */
1618 bool unrm : 1; /* Force address to be un-normalized */
1619 bool dlc : 1; /* NAVI: device level coherent */
1620 bool glc : 1; /* globally coherent */
1621 bool slc : 1; /* system level coherent */
1622 bool tfe : 1; /* texture fail enable */
1623 bool da : 1; /* declare an array */
1624 bool lwe : 1; /* LOD warning enable */
1625 bool r128 : 1; /* NAVI: Texture resource size */
1626 bool a16 : 1; /* VEGA, NAVI: Address components are 16-bits */
1627 bool d16 : 1; /* Convert 32-bit data to 16-bit data */
1628 bool disable_wqm : 1; /* Require an exec mask without helper invocations */
1644 bool slc : 1; /* system level coherent */
1645 bool glc : 1; /* globally coherent */
1646 bool dlc : 1; /* NAVI: device level coherent */
1647 bool lds : 1;
1648 bool nv : 1;
1649 bool disable_wqm : 1; /* Require an exec mask without helper invocations */
1659 bool compressed : 1;
1660 bool done : 1;
1661 bool valid_mask : 1;
1669 bool tmp_in_scc;
1755 constexpr bool
1783 constexpr bool
1789 static inline bool
1797 bool is_dead(const std::vector<uint16_t>& uses, Instruction* instr);
1799 bool can_use_opsel(amd_gfx_level gfx_level, aco_opcode op, int idx);
1800 bool instr_is_16bit(amd_gfx_level gfx_level, aco_opcode op);
1801 bool can_use_SDWA(amd_gfx_level gfx_level, const aco_ptr<Instruction>& instr, bool pre_ra);
1802 bool can_use_DPP(const aco_ptr<Instruction>& instr, bool pre_ra, bool dpp8);
1805 aco_ptr<Instruction> convert_to_DPP(aco_ptr<Instruction>& instr, bool dpp8);
1806 bool needs_exec_mask(const Instruction* instr);
1814 bool is_cmp(aco_opcode op);
1816 bool can_swap_operands(aco_ptr<Instruction>& instr, aco_opcode* new_op);
1822 bool should_form_clause(const Instruction* a, const Instruction* b);
1849 constexpr friend bool operator==(const RegisterDemand a, const RegisterDemand b) noexcept
1854 constexpr bool exceeds(const RegisterDemand other) const noexcept
1936 bool scc_live_out = false;
1996 constexpr bool has(SWStage stage) const
2003 constexpr bool operator==(const Stage& other) const { return sw == other.sw && hw == other.hw; }
2005 constexpr bool operator!=(const Stage& other) const { return sw != other.sw || hw != other.hw; }
2058 bool has_16bank_lds;
2067 bool has_fast_fma32 = false;
2068 bool has_mac_legacy32 = false;
2069 bool fused_mad_mix = false;
2070 bool xnack_enabled = false;
2071 bool sram_ecc_enabled = false;
2096 bool needs_exact = false; /* there exists an instruction with disable_wqm = true */
2097 bool needs_wqm = false; /* there exists a p_wqm instruction */
2106 bool wgp_mode;
2107 bool early_rast = false; /* whether rasterization can start as soon as the 1st DONE pos export */
2109 bool needs_vcc = false;
2113 bool collect_statistics = false;
2125 bool shorten_messages = false;
2181 bool skip_optimistic_path = false;
2187 enum amd_gfx_level gfx_level, enum radeon_family family, bool wgp_mode,
2242 bool check_print_asm_support(Program* program);
2243 bool print_asm(Program* program, std::vector<uint32_t>& binary, unsigned exec_size, FILE* output);
2244 bool validate_ir(Program* program);
2245 bool validate_ra(Program* program);
2247 void perfwarn(Program* program, bool cond, const char* msg, Instruction* instr = NULL);