Lines Matching refs:src1
876 Temp src1 = get_alu_src(ctx, instr->src[swap_srcs ? 0 : 1]);
877 if (src1.type() == RegType::sgpr) {
880 src0 = src1;
881 src1 = t;
883 src1 = as_vgpr(ctx, src1);
887 Operand op[2] = {Operand(src0), Operand(src1)};
919 Temp src1 = get_alu_src(ctx, instr->src[1]);
921 if (src1.type() == RegType::sgpr) {
923 std::swap(src0, src1);
931 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
976 Temp src1 = get_alu_src_vop3p(ctx, instr->src[!swap_srcs]);
977 if (src0.type() == RegType::sgpr && src1.type() == RegType::sgpr)
978 src1 = as_vgpr(ctx, src1);
989 Builder::Result res = bld.vop3p(op, Definition(dst), src0, src1, opsel_lo, opsel_hi);
1027 Temp src1 = get_alu_src(ctx, instr->src[1]);
1028 assert(src0.size() == src1.size());
1031 if (src1.type() == RegType::sgpr) {
1056 src0 = src1;
1057 src1 = t;
1059 src1 = as_vgpr(ctx, src1);
1064 bld.vopc(op, Definition(dst), src0, src1);
1071 Temp src1 = get_alu_src(ctx, instr->src[1]);
1076 assert(src1.type() == RegType::sgpr);
1077 assert(src0.regClass() == src1.regClass());
1080 Temp cmp = bld.sopc(op, bld.scc(bld.def(s1)), src0, src1);
1115 Temp src1 = get_alu_src(ctx, instr->src[1]);
1119 assert(src1.regClass() == bld.lm);
1121 bld.sop2(op, Definition(dst), bld.def(s1, scc), src0, src1);
1338 uadd32_sat(Builder& bld, Definition dst, Temp src0, Temp src1)
1341 Builder::Result add = bld.vadd32(bld.def(v1), src0, src1, true);
1348 add = bld.vop2_e64(aco_opcode::v_add_u32, dst, src0, src1);
1350 add = bld.vop2_e64(aco_opcode::v_add_co_u32, dst, bld.def(bld.lm), src0, src1);
1357 usub32_sat(Builder& bld, Definition dst, Temp src0, Temp src1)
1360 Builder::Result sub = bld.vsub32(bld.def(v1), src0, src1, true);
1367 sub = bld.vop2_e64(aco_opcode::v_sub_u32, dst, src0, src1);
1369 sub = bld.vop2_e64(aco_opcode::v_sub_co_u32, dst, bld.def(bld.lm), src0, src1);
1862 Temp src1 = get_alu_src(ctx, instr->src[1]);
1864 bld.vadd32(Definition(dst), Operand(src0), Operand(src1));
1868 assert(src0.size() == 2 && src1.size() == 2);
1872 Temp src10 = bld.tmp(src1.type(), 1);
1874 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
1901 Temp src1 = get_alu_src(ctx, instr->src[1]);
1904 bld.sop2(aco_opcode::s_add_u32, Definition(tmp), bld.scc(Definition(carry)), src0, src1);
1911 add_instr = bld.vop3(aco_opcode::v_add_u16_e64, Definition(dst), src0, src1).instr;
1913 if (src1.type() == RegType::sgpr)
1914 std::swap(src0, src1);
1916 bld.vop2_e64(aco_opcode::v_add_u16, Definition(dst), src0, as_vgpr(ctx, src1)).instr;
1921 uadd32_sat(bld, Definition(dst), src0, src1);
1925 assert(src0.size() == 2 && src1.size() == 2);
1930 Temp src10 = bld.tmp(src1.type(), 1);
1931 Temp src11 = bld.tmp(src1.type(), 1);
1932 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
1984 Temp src1 = get_alu_src(ctx, instr->src[1]);
1986 Temp cond = bld.sopc(aco_opcode::s_cmp_lt_i32, bld.def(s1, scc), src1, Operand::zero());
1991 bld.sop2(aco_opcode::s_add_i32, bld.def(s1), bld.scc(Definition(overflow)), src0, src1);
1996 src1 = as_vgpr(ctx, src1);
2000 bld.vop3(aco_opcode::v_add_i16, Definition(dst), src0, src1).instr;
2004 bld.vop3(aco_opcode::v_add_i32, Definition(dst), src0, src1).instr;
2013 Temp src1 = get_alu_src(ctx, instr->src[1]);
2015 bld.sop2(aco_opcode::s_add_u32, bld.def(s1), bld.scc(Definition(dst)), src0, src1);
2019 Temp carry = bld.vadd32(bld.def(v1), src0, src1, true).def(1).getTemp();
2028 Temp src10 = bld.tmp(src1.type(), 1);
2030 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
2060 Temp src1 = get_alu_src(ctx, instr->src[1]);
2062 bld.vsub32(Definition(dst), src0, src1);
2066 bld.vop3(aco_opcode::v_sub_u16_e64, Definition(dst), src0, src1);
2067 else if (src1.type() == RegType::sgpr)
2068 bld.vop2(aco_opcode::v_subrev_u16, Definition(dst), src1, as_vgpr(ctx, src0));
2070 bld.vop2(aco_opcode::v_sub_u16, Definition(dst), src0, as_vgpr(ctx, src1));
2072 bld.vsub32(Definition(dst), src0, src1);
2079 Temp src10 = bld.tmp(src1.type(), 1);
2081 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
2101 Temp src1 = get_alu_src(ctx, instr->src[1]);
2103 bld.sop2(aco_opcode::s_sub_u32, bld.def(s1), bld.scc(Definition(dst)), src0, src1);
2106 Temp borrow = bld.vsub32(bld.def(v1), src0, src1, true).def(1).getTemp();
2115 Temp src10 = bld.tmp(src1.type(), 1);
2117 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
2144 Temp src1 = get_alu_src(ctx, instr->src[1]);
2147 bld.sop2(aco_opcode::s_sub_u32, Definition(tmp), bld.scc(Definition(carry)), src0, src1);
2153 sub_instr = bld.vop3(aco_opcode::v_sub_u16_e64, Definition(dst), src0, src1).instr;
2156 if (src1.type() == RegType::sgpr) {
2157 std::swap(src0, src1);
2160 sub_instr = bld.vop2_e64(op, Definition(dst), src0, as_vgpr(ctx, src1)).instr;
2165 usub32_sat(bld, Definition(dst), src0, as_vgpr(ctx, src1));
2169 assert(src0.size() == 2 && src1.size() == 2);
2173 Temp src10 = bld.tmp(src1.type(), 1);
2174 Temp src11 = bld.tmp(src1.type(), 1);
2175 bld.pseudo(aco_opcode::p_split_vector, Definition(src10), Definition(src11), src1);
2226 Temp src1 = get_alu_src(ctx, instr->src[1]);
2228 Temp cond = bld.sopc(aco_opcode::s_cmp_gt_i32, bld.def(s1, scc), src1, Operand::zero());
2233 bld.sop2(aco_opcode::s_sub_i32, bld.def(s1), bld.scc(Definition(overflow)), src0, src1);
2238 src1 = as_vgpr(ctx, src1);
2242 bld.vop3(aco_opcode::v_sub_i16, Definition(dst), src0, src1).instr;
2246 bld.vop3(aco_opcode::v_sub_i32, Definition(dst), src0, src1).instr;
2365 Temp src1 = get_alu_src(ctx, instr->src[1]);
2367 if (src1.type() == RegType::vgpr || src0.type() != RegType::vgpr)
2372 if (src1.type() == RegType::vgpr || src0.type() != RegType::vgpr)
2378 as_vgpr(ctx, src1));
2392 Temp src1 = as_vgpr(ctx, get_alu_src_vop3p(ctx, instr->src[1]));
2402 bld.vop3p(aco_opcode::v_pk_fma_f16, Definition(dst), src0, src1, src2, opsel_lo, opsel_hi);
3479 Temp src1 = get_alu_src(ctx, instr->src[1]);
3481 bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src0, src1);
3512 Temp src1 = get_alu_src(ctx, instr->src[1]);
3515 src1 = emit_extract_vector(ctx, src1, 0, v2b);
3516 bld.pseudo(aco_opcode::p_create_vector, Definition(dst), src0, src1);
3520 src1 = bld.sop2(aco_opcode::s_lshl_b32, bld.def(s1), bld.def(s1, scc), src1,
3522 bld.sop2(aco_opcode::s_or_b32, Definition(dst), bld.def(s1, scc), src0, src1);
3542 Temp src1 = emit_extract_vector(ctx, src, 1, v1);
3545 bld.vop3(opcode, Definition(dst), src0, src1);
3552 Temp src1 = emit_extract_vector(ctx, src, 1, v1);
3555 bld.vop3(opcode, Definition(dst), src0, src1);
4513 add64_32(Builder& bld, Temp src0, Temp src1)
4519 if (src0.type() == RegType::vgpr || src1.type() == RegType::vgpr) {
4521 Temp carry = bld.vadd32(Definition(dst0), src00, src1, true).def(1).getTemp();
4527 bld.sop2(aco_opcode::s_add_u32, bld.def(s1), bld.scc(Definition(carry)), src00, src1);