Lines Matching refs:exec

139    assert(mask.isUndefined() || mask.isTemp() || (mask.isFixed() && mask.physReg() == exec));
156 } else if (mask.physReg() == exec) {
628 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.scc(Definition(dst)), val, Operand(exec, bld.lm));
7799 /* subgroupClusteredAnd(val, 4) -> ~wqm(exec & ~val) */
7801 bld.sop2(Builder::s_andn2, bld.def(bld.lm), bld.def(s1, scc), Operand(exec, bld.lm), src);
7805 /* subgroupClusteredOr(val, 4) -> wqm(val & exec) */
7808 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm)));
7810 /* subgroupAnd(val) -> (exec & ~val) == 0 */
7812 bld.sop2(Builder::s_andn2, bld.def(bld.lm), bld.def(s1, scc), Operand(exec, bld.lm), src)
7818 /* subgroupOr(val) -> (val & exec) != 0 */
7820 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm))
7825 /* subgroupXor(val) -> s_bcnt1_i32_b64(val & exec) & 1 */
7827 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm));
7838 * return ((val | ~exec) >> cluster_offset) & cluster_mask == cluster_mask
7840 * return ((val & exec) >> cluster_offset) & cluster_mask != 0
7842 * return v_bnt_u32_b32(((val & exec) >> cluster_offset) & cluster_mask, 0) & 1 != 0
7851 Operand(exec, bld.lm));
7854 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm));
7889 /* subgroupExclusiveAnd(val) -> mbcnt(exec & ~val) == 0
7890 * subgroupExclusiveOr(val) -> mbcnt(val & exec) != 0
7891 * subgroupExclusiveXor(val) -> mbcnt(val & exec) & 1 != 0
7896 bld.sop2(Builder::s_andn2, bld.def(bld.lm), bld.def(s1, scc), Operand(exec, bld.lm), src);
7898 tmp = bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm));
8052 bld.sop1(Builder::s_bcnt1_i32, bld.def(s1), bld.def(s1, scc), Operand(exec, bld.lm));
8079 packed_tid = emit_mbcnt(ctx, bld.tmp(v1), Operand(exec, bld.lm), Operand::c32(1u));
8081 packed_tid = emit_mbcnt(ctx, bld.tmp(v1), Operand(exec, bld.lm));
8096 Temp lane = bld.sop1(Builder::s_ff1_i32, bld.def(s1), Operand(exec, bld.lm));
8131 defs[num_defs++] = bld.def(bld.lm); /* used internally to save/restore exec */
8636 src = bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm));
8721 bld.sop1(Builder::s_ff1_i32, bld.def(s1), Operand(exec, bld.lm)));
8735 bld.sop2(Builder::s_andn2, bld.def(bld.lm), bld.def(s1, scc), Operand(exec, bld.lm), src)
8883 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm));
9027 bld.pseudo(aco_opcode::p_is_helper, Definition(dst), Operand(exec, bld.lm));
9044 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm));
9063 bld.sop2(Builder::s_and, bld.def(bld.lm), bld.def(s1, scc), src, Operand(exec, bld.lm));
9075 emit_wqm(bld, bld.sop1(Builder::s_ff1_i32, bld.def(s1), Operand(exec, bld.lm)),
9080 Temp flbit = bld.sop1(Builder::s_flbit_i32, bld.def(s1), Operand(exec, bld.lm));
9088 * Use exec as an operand so value numbering and the pre-RA optimizer won't recognize
9089 * two p_elect with different exec masks as the same.
9091 Temp elected = bld.pseudo(aco_opcode::p_elect, bld.def(bld.lm), Operand(exec, bld.lm));
10242 /* Discards can result in code running with an empty exec mask.
10692 /* uniform control flow never has an empty exec-mask */
11670 * (exec) so that the dead channels don't stay live throughout the program.
11878 Temp first_lane = bld.sop1(Builder::s_ff1_i32, bld.def(s1), Operand(exec, bld.lm));
12377 bld.sop2(aco_opcode::s_bfm_b64, Definition(exec, s2), count, Operand::c32(0u));
12381 bld.sop2(aco_opcode::s_cselect_b64, Definition(exec, s2), Operand::c64(UINT64_MAX),
12382 Operand(exec, s2), Operand(scc, s1));