Lines Matching defs:def
219 for (Definition& def : pred->definitions) {
220 if (regs_intersect(reg, mask_size, def.physReg(), def.size())) {
221 unsigned start = def.physReg() > reg ? def.physReg() - reg : 0;
222 unsigned end = MIN2(mask_size, start + def.size());
349 Definition def = instr->definitions[0];
350 if (!*NOPs && test_bitset_range(ctx.smem_clause_read_write, def.physReg(), def.size()))
417 for (Definition def : instr->definitions) {
418 if (def.regClass().type() != RegType::sgpr) {
419 for (unsigned i = 0; i < def.size(); i++)
420 NOPs = MAX2(NOPs, ctx.vmem_store_then_wr_data[(def.physReg() & 0xff) + i]);
503 Definition def = instr->definitions[0];
504 set_bitset_range(ctx.smem_clause_read_write, def.physReg(), def.size());
505 set_bitset_range(ctx.smem_clause_write, def.physReg(), def.size());
509 for (Definition def : instr->definitions) {
510 if (def.regClass().type() == RegType::sgpr) {
511 if (def.physReg() == vcc || def.physReg() == vcc_hi) {
515 if (def.physReg() == exec || def.physReg() == exec_hi) {
524 Definition def = instr->definitions[0];
525 if (def.physReg() == m0) {
567 [&check_regs](const Definition& def) -> bool
570 for (unsigned i = 0; i < def.size(); i++) {
571 unsigned def_reg = def.physReg() + i;
619 [](const Definition& def) -> bool
620 { return def.physReg() == exec_lo || def.physReg() == exec_hi; });
627 [](const Definition& def) -> bool
628 { return def.getTemp().type() == RegType::sgpr; });