Lines Matching refs:dcc
151 return (!surf->u.gfx9.color.dcc.independent_64B_blocks &&
152 surf->u.gfx9.color.dcc.independent_128B_blocks &&
153 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_128B) ||
155 surf->u.gfx9.color.dcc.independent_64B_blocks &&
156 surf->u.gfx9.color.dcc.independent_128B_blocks &&
157 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B);
186 surf->u.gfx9.color.dcc.independent_64B_blocks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_64B, modifier);
187 surf->u.gfx9.color.dcc.independent_128B_blocks = AMD_FMT_MOD_GET(DCC_INDEPENDENT_128B, modifier);
188 surf->u.gfx9.color.dcc.max_compressed_block_size = AMD_FMT_MOD_GET(DCC_MAX_COMPRESSED_BLOCK, modifier);
239 if (!options->dcc)
1527 return surf->u.gfx9.color.dcc.independent_64B_blocks && !surf->u.gfx9.color.dcc.independent_128B_blocks &&
1528 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B;
1533 return !surf->u.gfx9.color.dcc.independent_64B_blocks && surf->u.gfx9.color.dcc.independent_128B_blocks &&
1534 surf->u.gfx9.color.dcc.max_compressed_block_size <= V_028C78_MAX_BLOCK_SIZE_128B;
1537 bool valid_64b = surf->u.gfx9.color.dcc.independent_64B_blocks &&
1538 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B;
1539 bool valid_128b = surf->u.gfx9.color.dcc.independent_128B_blocks &&
1540 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_128B;
1546 return surf->u.gfx9.color.dcc.independent_64B_blocks != surf->u.gfx9.color.dcc.independent_128B_blocks &&
1551 return (surf->u.gfx9.color.dcc.independent_64B_blocks != surf->u.gfx9.color.dcc.independent_128B_blocks &&
1553 (surf->u.gfx9.color.dcc.independent_64B_blocks &&
1554 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B);
1617 assert(surf->u.gfx9.color.dcc.independent_64B_blocks &&
1618 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B);
1624 if (info->gfx_level == GFX10 && surf->u.gfx9.color.dcc.independent_128B_blocks)
1628 (surf->u.gfx9.color.dcc.independent_64B_blocks &&
1629 surf->u.gfx9.color.dcc.max_compressed_block_size == V_028C78_MAX_BLOCK_SIZE_64B));
1637 ADDR2_COMPUTE_DCCINFO_OUTPUT *dcc,
1640 equation->meta_block_width = dcc->metaBlkWidth;
1641 equation->meta_block_height = dcc->metaBlkHeight;
1642 equation->meta_block_depth = dcc->metaBlkDepth;
1647 assert(dcc->equation.gfx10_bits[i] == 0);
1650 assert(dcc->equation.gfx10_bits[i] == 0);
1652 memcpy(equation->u.gfx10_bits, dcc->equation.gfx10_bits + 4,
1655 assert(dcc->equation.gfx9.num_bits <= ARRAY_SIZE(equation->u.gfx9.bit));
1657 equation->u.gfx9.num_bits = dcc->equation.gfx9.num_bits;
1658 equation->u.gfx9.num_pipe_bits = dcc->equation.gfx9.numPipeBits;
1661 equation->u.gfx9.bit[b].coord[c].dim = dcc->equation.gfx9.bit[b].coord[c].dim;
1662 equation->u.gfx9.bit[b].coord[c].ord = dcc->equation.gfx9.bit[b].coord[c].ord;
1926 surf->u.gfx9.color.dcc.rb_aligned = din.dccKeyFlags.rbAligned;
1927 surf->u.gfx9.color.dcc.pipe_aligned = din.dccKeyFlags.pipeAligned;
2001 assert(surf->u.gfx9.color.dcc.pipe_aligned || surf->u.gfx9.color.dcc.rb_aligned);
2019 surf->u.gfx9.color.dcc.display_equation_valid = true;
2238 surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
2239 surf->u.gfx9.color.dcc.independent_128B_blocks = 0;
2240 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
2242 surf->u.gfx9.color.dcc.independent_64B_blocks = 0;
2243 surf->u.gfx9.color.dcc.independent_128B_blocks = 1;
2244 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_128B;
2269 surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
2270 surf->u.gfx9.color.dcc.independent_128B_blocks = 0;
2271 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
2281 surf->u.gfx9.color.dcc.independent_64B_blocks = 1;
2282 surf->u.gfx9.color.dcc.independent_128B_blocks = 1;
2283 surf->u.gfx9.color.dcc.max_compressed_block_size = V_028C78_MAX_BLOCK_SIZE_64B;
2380 (!is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned,
2381 surf->u.gfx9.color.dcc.pipe_aligned) ||
2383 (info->use_display_dcc_with_retile_blit && !surf->u.gfx9.color.dcc.display_equation_valid)))
2397 assert(is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned,
2398 surf->u.gfx9.color.dcc.pipe_aligned));
2408 is_dcc_supported_by_DCN(info, config, surf, surf->u.gfx9.color.dcc.rb_aligned,
2409 surf->u.gfx9.color.dcc.pipe_aligned)) {
2537 surf->u.gfx9.color.dcc.display_equation_valid) {
2626 surf->u.gfx9.color.dcc.independent_64B_blocks =
2628 surf->u.gfx9.color.dcc.independent_128B_blocks =
2630 surf->u.gfx9.color.dcc.max_compressed_block_size =
2676 AMDGPU_TILING_SET(DCC_INDEPENDENT_64B, surf->u.gfx9.color.dcc.independent_64B_blocks);
2678 AMDGPU_TILING_SET(DCC_INDEPENDENT_128B, surf->u.gfx9.color.dcc.independent_128B_blocks);
2680 surf->u.gfx9.color.dcc.max_compressed_block_size);
2774 surf->u.gfx9.color.dcc.pipe_aligned = G_008F24_META_PIPE_ALIGNED(desc[5]);
2775 surf->u.gfx9.color.dcc.rb_aligned = G_008F24_META_RB_ALIGNED(desc[5]);
2778 if (!surf->u.gfx9.color.dcc.pipe_aligned && !surf->u.gfx9.color.dcc.rb_aligned)
2787 surf->u.gfx9.color.dcc.pipe_aligned = G_00A018_META_PIPE_ALIGNED(desc[6]);