Lines Matching defs:csio
906 ADDR_COMPUTE_SURFACE_INFO_OUTPUT *csio, struct radeon_surf *surf)
908 surf->surf_alignment_log2 = util_logbase2(csio->baseAlign);
909 surf->u.legacy.pipe_config = csio->pTileInfo->pipeConfig - 1;
913 if (csio->tileMode >= ADDR_TM_2D_TILED_THIN1) {
914 surf->u.legacy.bankw = csio->pTileInfo->bankWidth;
915 surf->u.legacy.bankh = csio->pTileInfo->bankHeight;
916 surf->u.legacy.mtilea = csio->pTileInfo->macroAspectRatio;
917 surf->u.legacy.tile_split = csio->pTileInfo->tileSplitBytes;
918 surf->u.legacy.num_banks = csio->pTileInfo->banks;
919 surf->u.legacy.macro_tile_index = csio->macroModeIndex;
937 AddrBaseSwizzleIn.tileIndex = csio->tileIndex;
938 AddrBaseSwizzleIn.macroModeIndex = csio->macroModeIndex;
939 AddrBaseSwizzleIn.pTileInfo = csio->pTileInfo;
940 AddrBaseSwizzleIn.tileMode = csio->tileMode;