Lines Matching refs:value
133 UINT_8 value; ///< Value
156 UINT_32 value;
194 UINT_32 value;
317 UINT_32 value;
330 UINT_32 gbAddrConfig; ///< For R8xx, use GB_ADDR_CONFIG register value.
333 /// if this value is 0, use chip to set default value
335 /// Register value of CC_RB_BACKEND_DISABLE.BACKEND_DISABLE
339 /// No enums for this value in h/w header files
441 * Valid bankWidth/bankHeight value:
453 UINT_32 banks; ///< Number of banks, numerical value
535 UINT_32 value;
609 /// By default this value equals to surfSize for volume
610 UINT_32 pitchTileMax; ///< PITCH_TILE_MAX value for h/w register
611 UINT_32 heightTileMax; ///< HEIGHT_TILE_MAX value for h/w register
612 UINT_32 sliceTileMax; ///< SLICE_TILE_MAX value for h/w register
862 UINT_32 value;
1082 UINT_32 value;
1554 UINT_32 base256b; ///< Base256b value
1696 UINT_32 tileSwizzle; ///< Recalculated tileSwizzle value
1746 UINT_32 value;
1879 UINT_8* pPixel; ///< Real depth value. Same data type as depth buffer.
1892 * Convert a FLT_32 value to a depth/stencil pixel value
1938 UINT_8* pPixel; ///< Real color value. Same data type as color buffer.
1947 * Convert a FLT_32 value to a red/green/blue/alpha pixel value
1989 /// FALSE: convert from real value to HW value;
1990 /// TRUE: convert from HW value to real value.
1993 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with real value
2015 ADDR_TILEINFO* pTileInfo; ///< Tile parameters with hardware register value
2024 * Convert tile info from real value to hardware register value
2417 UINT_32 value;
2701 UINT_32 value;
3173 UINT_32 value;
3580 * Calculate a valid bank pipe xor value for client to use.
3626 * Calculate slice pipe bank xor value based on base pipe bank xor and slice id.
3768 UINT_32 value;
3790 UINT_32 value;
3856 UINT_32 value;
3890 /// be padded to multiple of this value (in bytes)