Lines Matching refs:__u32
30 __u32 param; /* in, value in enum drm_lima_param */
31 __u32 pad; /* pad, must be zero */
46 __u32 size; /* in, buffer size */
47 __u32 flags; /* in, buffer flags */
48 __u32 handle; /* out, GEM buffer handle */
49 __u32 pad; /* pad, must be zero */
56 __u32 handle; /* in, GEM buffer handle */
57 __u32 va; /* out, virtual address mapped into GPU MMU */
66 __u32 handle; /* in, GEM buffer handle */
67 __u32 flags; /* in, buffer read/write by GPU */
74 __u32 frame[LIMA_GP_FRAME_REG_NUM];
82 __u32 frame[LIMA_PP_FRAME_REG_NUM];
83 __u32 num_pp;
84 __u32 wb[3 * LIMA_PP_WB_REG_NUM];
85 __u32 plbu_array_address[4];
86 __u32 fragment_stack_address[4];
91 __u32 frame[LIMA_PP_FRAME_REG_NUM];
92 __u32 num_pp;
93 __u32 wb[3 * LIMA_PP_WB_REG_NUM];
94 __u32 use_dlbu;
95 __u32 _pad;
97 __u32 plbu_array_address[8];
98 __u32 dlbu_regs[4];
100 __u32 fragment_stack_address[8];
117 __u32 ctx; /* in, context handle task is submitted to */
118 __u32 pipe; /* in, which pipe to use, GP/PP */
119 __u32 nr_bos; /* in, array length of bos field */
120 __u32 frame_size; /* in, size of frame field */
123 __u32 flags; /* in, submit flags */
124 __u32 out_sync; /* in, drm_syncobj handle used to wait task finish after submission */
125 __u32 in_sync[2]; /* in, drm_syncobj handle used to wait before start this task */
135 __u32 handle; /* in, GEM buffer handle */
136 __u32 op; /* in, CPU want to read/write this buffer */
144 __u32 id; /* out, context handle */
145 __u32 _pad; /* pad, must be zero */
152 __u32 id; /* in, context handle */
153 __u32 _pad; /* pad, must be zero */