Lines Matching refs:__u32
118 __u32 name;
124 __u32 flags;
130 __u32 rsvd[4];
376 __u32 unused1, unused2, unused3;
381 __u32 front_bo_handle;
382 __u32 back_bo_handle;
383 __u32 unused_bo_handle;
384 __u32 depth_bo_handle;
864 __u32 handle;
865 __u32 pad;
870 __u32 handle;
871 __u32 pad;
886 __u32 handle;
887 __u32 pad;
902 __u32 handle;
903 __u32 pad;
930 __u32 handle;
931 __u32 pad;
952 __u32 handle;
954 __u32 pad;
1036 __u32 handle;
1039 __u32 read_domains;
1047 __u32 write_domain;
1052 __u32 handle;
1064 __u32 target_handle;
1070 __u32 delta;
1088 __u32 read_domains;
1097 __u32 write_domain;
1130 __u32 handle;
1133 __u32 relocation_count;
1163 __u32 buffer_count;
1166 __u32 batch_start_offset;
1168 __u32 batch_len;
1169 __u32 DR1;
1170 __u32 DR4;
1171 __u32 num_cliprects;
1181 __u32 handle;
1184 __u32 relocation_count;
1266 __u32 handle;
1277 __u32 flags;
1327 __u32 buffer_count;
1333 __u32 batch_start_offset;
1340 __u32 batch_len;
1343 __u32 DR1;
1346 __u32 DR4;
1349 __u32 num_cliprects;
1512 __u32 handle;
1513 __u32 pad;
1524 __u32 handle;
1525 __u32 pad;
1530 __u32 handle;
1577 __u32 busy;
1623 __u32 handle;
1654 __u32 caching;
1681 __u32 handle;
1695 __u32 tiling_mode;
1701 __u32 stride;
1707 __u32 swizzle_mode;
1712 __u32 handle;
1718 __u32 tiling_mode;
1724 __u32 swizzle_mode;
1730 __u32 phys_swizzle_mode;
1746 __u32 crtc_id;
1749 __u32 pipe;
1758 __u32 handle;
1763 __u32 madv;
1766 __u32 retained;
1795 __u32 flags;
1797 __u32 bo_handle;
1801 __u32 offset_Y; /* offset for packet formats */
1802 __u32 offset_U;
1803 __u32 offset_V;
1811 __u32 crtc_id;
1823 __u32 flags;
1824 __u32 color_key;
1826 __u32 contrast;
1827 __u32 saturation;
1828 __u32 gamma0;
1829 __u32 gamma1;
1830 __u32 gamma2;
1831 __u32 gamma3;
1832 __u32 gamma4;
1833 __u32 gamma5;
1863 __u32 plane_id;
1864 __u32 min_value;
1865 __u32 channel_mask;
1866 __u32 max_value;
1867 __u32 flags;
1872 __u32 bo_handle;
1873 __u32 flags;
1879 __u32 ctx_id; /* output: id of new context*/
1880 __u32 pad;
1888 __u32 ctx_id;
1902 __u32 flags;
1929 __u32 ctx_id;
1932 __u32 size;
2115 __u32 flags;
2141 __u32 rsvd;
2228 __u32 flags; /* all undefined flags must be zero */
2239 __u32 flags; \
2496 __u32 ctx_id;
2497 __u32 pad;
2526 __u32 flags;
2529 __u32 vm_id;
2555 __u32 ctx_id;
2556 __u32 flags;
2559 __u32 reset_count;
2562 __u32 batch_active;
2565 __u32 batch_pending;
2567 __u32 pad;
2627 __u32 flags;
2636 __u32 handle;
2739 __u32 flags;
2745 __u32 num_properties;
2794 __u32 type;
2856 __u32 n_mux_regs;
2863 __u32 n_boolean_regs;
2870 __u32 n_flex_regs;
2952 __u32 flags;
2992 __u32 num_items;
2997 __u32 flags;
3197 __u32 rsvd0;
3225 __u32 num_engines;
3228 __u32 rsvd[3];
3279 __u32 flags;
3334 __u32 rsvd0;
3461 __u32 num_regions;
3464 __u32 rsvd[3];
3539 __u32 handle;
3583 __u32 flags;
3665 __u32 pad;
3667 __u32 num_regions;
3714 __u32 flags;