Lines Matching defs:engines
160 * Different engines serve different roles, and there may be more than one
163 * on a certain subset of engines, or for providing information about that
170 * Render engines support instructions used for 3D, Compute (GPGPU),
181 * Copy engines (also referred to as "blitters") support instructions
184 * Copy engines can perform pre-defined logical or bitwise operations
192 * Video engines (also referred to as "bit stream decode" (BSD) or
201 * Video enhancement engines (also referred to as "vebox") support
209 * Compute engines support a subset of the instructions available
210 * on render engines: compute engines support Compute (GPGPU) and
696 * value reports the support of context isolation for individual engines by
1221 * clients or engines (i.e. suballocating objects), the implicit tracking
1546 * conditions which prevent the report of which engines are busy from
1548 * object is idle, the result of the ioctl, that all engines are idle,
1561 * The high word (bits 16:31) are a bitmask of which engines classes
1562 * are currently reading from the object. Multiple engines may be
1568 * Some hardware may have parallel execution engines, e.g. multiple
1569 * media engines, which are mapped to the same class identifier and so
1574 * the object is idle or busy. The report of which engines are busy
1643 * Special GPU caching mode which is coherent with the scanout engines.
1989 * Bind this context to operate on this subset of available engines. Henceforth,
1991 * an index into this array of engines; I915_EXEC_DEFAULT selecting engine[0]
1999 * Setting the number of engines bound to the context to 0, by passing a zero
2096 * Not all GPUs or engines support this functionality in which case an error
2148 * physical engines, submit a batch buffer, and let the driver execute it on any
2152 * class engine, like for example GT3+ Skylake parts with their two VCS engines.
2154 * For instance userspace can enumerate all engines of a certain class using the
2170 * .engines = { { I915_ENGINE_CLASS_VIDEO, 0 },
2173 * I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 1) = {
2174 * .engines = { { I915_ENGINE_CLASS_INVALID,
2184 * .value = to_user_pointer(&engines),
2185 * .size = sizeof(engines),
2210 * Enable load balancing across this set of engines.
2213 * used will proxy the execbuffer request onto one of the set of engines
2216 * The set of engines must be compatible (e.g. the same HW class) as they
2220 * the backing engines (bypassing the load balancing proxy), the context must
2221 * be defined to use a single timeline for all engines.
2232 struct i915_engine_class_instance engines[0];
2241 struct i915_engine_class_instance engines[N__]; \
2249 * All engines are equal, but some are more equal than others. Given
2251 * a request on a given subset of engines in parallel to a request on a
2252 * specific engine. We enable this selection of engines within a virtual
2264 __u16 virtual_index; /* index of virtual engine in ctx->engines[] */
2270 struct i915_engine_class_instance engines[0];
2280 struct i915_engine_class_instance engines[N__]; \
2320 * engines=CS[0],CS[1])
2328 * engines=CS[0],CS[2],CS[1],CS[3])
2334 * This can be thought of as two virtual engines, each containing two
2335 * engines thereby making a 2D array. However, there are bonds tying the
2347 * engines=CS[0],CS[1],CS[1],CS[3])
2392 * @engines: 2-d array of engine instances to configure parallel engine
2397 struct i915_engine_class_instance engines[0];
2409 struct i915_engine_class_instance engines[N__]; \
2415 * Context engine map is a new way of addressing engines when submitting batch-
2419 * To use it created GEM contexts need to be configured with a list of engines
2431 * I915_DEFINE_CONTEXT_PARAM_ENGINES(engines, 2) = {
2432 * .engines = { { I915_ENGINE_CLASS_RENDER, 0 },
2441 * .value = to_user_pointer(&engines),
2442 * .size = sizeof(engines),
2452 * // We have now created a GEM context with two engines in the map:
2453 * // Index 0 points to rcs0 while index 1 points to bcs0. Other engines
2472 struct i915_engine_class_instance engines[0];
2477 struct i915_engine_class_instance engines[N__]; \
3120 * Engine discovery uAPI is a way of enumerating physical engines present in a
3126 * started to establish a pattern of having multiple engines of a same class,
3132 * Example for getting the list of engines:
3147 * // enough to hold our array of engines. The kernel will fill out the
3159 * // blob, which the kernel can then populate with info on all engines.
3167 * struct drm_i915_engine_info einfo = info->engines[i];
3175 * Each of the enumerated engines, apart from being defined by its class and
3179 * For instance video engines which support HEVC encoding will have the
3183 * of addressing engines when submitting batch buffers using contexts with
3220 * Engine info query enumerates all engines known to the driver by filling in
3230 /** @engines: Marker for drm_i915_engine_info structures. */
3231 struct drm_i915_engine_info engines[];